ADcaiyang A/D sampling control module designed A/D

Title: ADcaiyang

Category:
VHDL-FPGA-Verilog
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[Text]
File Size:
881byte
Update:
2008-10-13
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Uploaded by:
xuyeyanyan

Description: A/D sampling control module designed A/D sampling control modules responsible for controlling external ADC0809 chip multi-channel analog input, as well as the amount of strobe to achieve A/D sampling the reasonable control of the process. This part of the design under the EDA technology and VHDL P211- P212 preparation of the cases of 8-2, the difference is that here the book ADDA <= 1 of the assignment changed to ADDA <= EN , EN is the set of input buttons used to control between INO and IN1 channel selection.

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