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Title:
DDR2_module_VHDL_test(Rev0.1)
Download
Category:
VHDL-FPGA-Verilog
Tags:
[C/C++]
[源码]
File Size:
123.5kb
Update:
2008-10-13
Downloads:
0 Times
Uploaded by:
laijun_ok
Description:
ddr 2 interface test module ddr 2 read and write interface to read and write test module
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More information of uploader laijun_ok
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