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Title:
simulink-03-31
Download
Category:
VHDL-FPGA-Verilog
Tags:
[Matlab]
[源码]
File Size:
291.6kb
Update:
2008-10-13
Downloads:
0 Times
Uploaded by:
ltianyang
Description:
Based on MATLAB/DSP Build controllable signal generator, by the Matlab modeling synthesis, and generates VHDL code, adopted by the Quartus compiler.
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