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Description: Digital storage and hybrid signal large scale integrated circuits
This book systematically introduces the test and testable design of the VLSI system of digital, memory and mixed signals. The book is based on the author's many years of research achievements and teaching practice, combining with the latest research hotspots of international attention and referring to a large number of literatures. The book consists of three parts. The first part is the test foundation, which introduces the basic concept of test, test equipment, test economics and fault model. The second part is to test method, the combination was described in detail and the test generation of sequential circuits, memory test, based on the module based on DSP and analog and mixed signal test, delay test and IDDQ test, etc. The third part is testable design, which includes scanning design, BIST, boundary scan test, simulation test bus standard and SOC (System on a chip) test based on IP core core.
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