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Title:
FIFO_Buffer(verilog)
Download
Category:
VHDL-FPGA-Verilog
Tags:
[ASM]
[源码]
File Size:
70.26kb
Update:
2008-10-13
Downloads:
2 Times
Uploaded by:
zhenghaiwei1020
Description:
This is a FIFO_Buffer the Verilog code.
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