Description: A CLA of Verilog realize that contains the test documents, can be integrated and very useful
To Search:
- [synopsy_dc_ppt] - synopsys dc Chinese ppt materials, more
- [www] - Red and black tree realize realize the i
- [jianyidianziqin] - Their own procedures for the preparation
- [DesignCompilerFAQ] - Synopsys DC FRQ The most popular compreh
- [ahead_adder] - Verilog language using an 8bit realize t
- [adder] - 8-bit CLA is to make your binary direct
- [add2] - Two 4bit CLA realize 8bit adder
- [trueif] - A CLA (and its testbench). V file
- [adder] - 8 cla, used for the structure, you can e
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