Description: For the main control board memory (SRAM) a small amount of stored data and the highest frequency of low, based on SDR Sdram (Synchronous Dynamic RAM) as the main memory of the LED display systems. In the experiment, the use of field programmable gate array (FPGA) to realize the logic function of each module. The eventual realization of L ED display control, and a master control panel to maximize the control of the 256 × 128 pixels point, based on the same conditions than the static memory control area has doubled, to verify the dynamic memory of nuclear [7 ] the practicality.
- [sdram4m16_L2_42] - FPGA SDRAM with the operation of the spe
- [cycloneII] - altera cycloneII fpga the pcb package pl
- [64x64LED] - LED board LED display program panel disp
- [SDRAMconntrol] - SDRAM Controller Design with VHDL realiz
- [sdram_0] - SDRAM procedures of the Verilog HDL for
- [RTL_Memory_AN] - FPGA memory code VHDL, verilog descripti
- [de2_SRAM] - 脢 鹿 脫脙FPGA 驴 脴脰脝SRAM渭脛脭
- [SDRAM] - SDRAM principle and timing, for the real
- [sdramvhdl] - SDRAM memory chips, FPGA interface contr
- [SRAM_Controller] - SRAM controller
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