- Category:
- Other systems
- Tags:
-
- File Size:
- 1.32kb
- Update:
- 2008-10-13
- Downloads:
- 0 Times
- Uploaded by:
- xckt007
Description: The program s function is to achieve the design of digital phase-locked loop. Source code can be directly carried out simulation test ◎
To Search:
- [FPGA-baseddigitalPLLdesign.Rar] - prepared using VHDL they simply based on
- [2005117163755] - MPSK demodulator is the key carrier sync
- [pll] - PLL on the MATLAB simulation program, in
- [digitalPLL] - DPLL realize source, has a great referen
- [adpll] - All-digital phase-locked loop function a
- [12c] - 51 Single-chip electronic bell From c so
- [dianti] - The realization of the program s functio
- [pll] - Collection of digital phase-locked loop
- [duijiangji] - AM SSB walkie-talkie procedures MSP430 S
File list (Check if you may need any files):