Description: Timing circuit design problem: timing circuit is a key component of a VLSI chip, which gives a timing circuit
Simple model: a fully balanced binary tree with n leaf leaves (where n is a power of 2). Each of the trees
Side e has a corresponding length. 0). The distance from the root to a given leaf is the path from the root to the leaf
The sum of the lengths of all the sides.
The roots produce a clock signal that propagates along these edges to the leaves, and the time the signal reaches a given leaf is
Proportional to the distance from the root to the leaf. If all the leaves are different from the root, the signal does not reach the leaves at the same time
A big problem in the design of the road, we need the leaves to be completely synchronized, and we all accept the signal at the same time, to do this
So, we're going to have to increase the length of some edges so that all the roots to the leaves have the same length, if
When we meet this requirement, the tree (with its new edge) will be called zero - sloping. Our goal of optimization
It is a zero slope in a way that holds the sum of all the sides. An algorithm for the growth of certain edge lengths is given, and the resulting tree has a zero inclination and the minimum of the total edge length.
To Search:
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