Description: spi-source is the verliog, reference may need to design their own projects, there is a need to have a follow-up instructions attached
- [SPI_verilogHDL] - primitive code is based on Verilog HDL l
- [SimpleSpi] - master spi the source code (verilog), in
- [modulator] - Use FPGA to control the operation of AD9
- [SPI_FireWall] - verilog spi file with testbench
- [fpgaSpiColose] - FPGA-based SPI controller. Doc, includin
- [SPI] - SPI Bus Protocol introduced a communicat
- [spi_op_core] - Verilog programming SPI protocol, includ
- [NIOS_II] - NIOS II several source code, read SD car
- [spi_core_open] - SPI master design
- [txc_ad9957ctrl] - ad9957 chip configuration procedures, in
File list (Check if you may need any files):
func_sim.do
post_sim.do
readme.doc
readme.txt
sck_logic.vhd
spi_control_sm.vhd
spi_interface.vhd
spi_master.cxt
spi_master.jed
spi_master.npl
spi_master.rpt
spi_master.vhd
spi_master_tb.vhd
spi_master_timesim.vhd
spi_rcv_shift_reg.vhd
spi_xmit_shift_reg.vhd
uc_interface.vhd
upcnt4.vhd
upcnt5.vhd
wave_color.do
wave_post_color.do
work
....\roc
....\...\roc_v.dat
....\...\roc_v.psm
....\...\_primary.dat
....\spi_master
....\..........\structure.dat
....\..........\structure.psm
....\..........\_primary.dat
....\testbench
....\.........\behavior.dat
....\.........\behavior.psm
....\.........\_primary.dat
....\_info
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