Description: AFS600-based Fusion Series of FPGA 51 nuclear, tried on the board, you can write 1602 on 51 of the display of the nuclear program, we can show that we can process other 51.
File list (Check if you may need any files):
core8051_lcd1602
................\component
................\constraint
................\..........\USER_CORE8051.pdc
................\core8051.prj
................\core8051.prj.convert.8.0.bak
................\core8051.prj.convert.8.1.bak
................\coreconsole
................\designer
................\........\impl1
................\........\.....\ada02172-1.tmp
................\........\.....\ada02172-3.tmp
................\........\.....\ada02392-3.tmp
................\........\.....\ada02392-5.tmp
................\........\.....\designer.log
................\........\.....\designer_genhdl.log
................\........\.....\simulation
................\........\.....\..........\postlayout
................\........\.....\..........\..........\@u@s@e@r_@c@o@r@e8051
................\........\.....\..........\..........\.....................\verilog.psm
................\........\.....\..........\..........\.....................\_primary.dat
................\........\.....\..........\..........\.....................\_primary.dbs
................\........\.....\..........\..........\.....................\_primary.vhd
................\........\.....\..........\..........\stimulus
................\........\.....\..........\..........\........\verilog.psm
................\........\.....\..........\..........\........\_primary.dat
................\........\.....\..........\..........\........\_primary.dbs
................\........\.....\..........\..........\........\_primary.vhd
................\........\.....\..........\..........\tb_clock_minmax
................\........\.....\..........\..........\...............\verilog.psm
................\........\.....\..........\..........\...............\_primary.dat
................\........\.....\..........\..........\...............\_primary.dbs
................\........\.....\..........\..........\...............\_primary.vhd
................\........\.....\..........\..........\_info
................\........\.....\..........\..........\_temp
................\........\.....\USER_CORE8051.adb
................\........\.....\USER_CORE8051.dtf
................\........\.....\.................\verify.log
................\........\.....\USER_CORE8051.ide_des
................\........\.....\USER_CORE8051.pdb
................\........\.....\USER_CORE8051.pdb.depends
................\........\.....\USER_CORE8051.tcl
................\........\.....\USER_CORE8051_ba.sdf
................\........\.....\USER_CORE8051_ba.v
................\........\.....\USER_CORE8051_fp
................\........\.....\................\$$FlashPro_FPBBALTLPT1.L$$
................\........\.....\................\projectData
................\........\.....\................\...........\USER_CORE8051.pdb
................\........\.....\................\USER_CORE8051.log
................\........\.....\USER_CORE8051_fp_1
................\........\.....\..................\$$FlashPro_FPBBALTLPT1.L$$
................\........\.....\..................\projectData
................\........\.....\..................\...........\USER_CORE8051.pdb
................\........\.....\..................\USER_CORE8051.log
................\........\.....\..................\USER_CORE8051.pro
................\hdl
................\...\core8051_oci0_withoutio_pa3.v
................\...\Core8051_ROM_Ctr.v
................\...\user_core8051.v
................\phy_synthesis
................\simulation
................\..........\data_store_LCD1602-4BIT.hex
................\..........\data_store_WL030.hex
................\..........\data_store_zhousfe.hex
................\..........\flashmem.mem
................\..........\flashmem_test.hex
................\..........\meminit.dat
................\..........\modelsim.ini
................\..........\modelsim.ini.sav
................\..........\modelsim.log
................\..........\postsynth
................\..........\.........\@c@o@r@e8051
................\..........\.........\............\verilog.psm
................\..........\.........\............\_primary.dat
...............
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