Description: (2,1,9) convolutional codec, decoding part decoding algorithm used Vitebi design using Verilog HDL language simulation in ModelSim platform through
- [viterbidecoding] - use Matlab prepared by the Viterbi decod
- [vtbit] - Convolutional Codes and Viterbi decoding
- [Viterbi] - 3 on the Viterbi FPGA optimization codec
- [219encode] - (219) convolutional coding verilog hdl s
- [DW8051] - Synopsys company DW8051 source code, wri
- [husw] - Language Design with VHDL Viterbi decode
- [viterbidecoder] - viterbi decoder implementation by verilo
- [212] - (2,1,2) convolutional codes Viterbi deco
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