Description: The Inter IC bus or I2C bus is a simple bidirectional two wire bus designed primarily for general control
and data transfer communication between ICs.
Some of the features of the I2C bus are:
• Two signal lines, a serial data line (SDA) and a serial clock line (SCL), and ground are required. A
12V supply line (500mA max.) for powering the peripherals often may be present.
• Each device connected to the bus is software addressable by a unique address and simple
master/ slave relationships exist at all times masters can operate as master-transmitters or as
master-receivers.
• The I2C bus is a true multi-master bus including collision detection and arbitration to prevent data
corruption if two or more masters simultaneously initiate data transfer systems.
• Serial, 8-bit oriented, bidirectional data transfers can be made at up to 100 KBit/s in the standard
mode or up to 400 KBit/s in the fast mode.
- [I2C应用程序] - This code implements the basic functions
- [I2CConnection] - C51 single-chip analog dual I2C communic
- [I2Cslave] - i2c slave, this is the receiving end I2C
- [32qam_awgn] - 32qam modulation symbols in the AWGN cha
- [Ethernet] - harmmer-os ethernet part code
- [IIC_slave_code] - about I2C slave code about I2C slave cod
- [I2C_SLAVE] - I2C slave side. Can support more than on
- [bayer2rgb] - bayer to RGB, 12bit entry, 24bit out of
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