Description: This procedure for the MICROCHIP 24LC64 EEPROM read and write. This procedure does not use chips cascade way, please A0, A1, A2 pin to low level access. This procedure used IOC6 as SDA, IOC7 as SCL. Process address space available to the largest 64K: 24LC00-16-0, 24LC01-128-8, 24LC02-256-8, 24LC04-512-16, 24LC08-1K-16, 24LC16-2K-32, 24LC32-4K- 32,24 LC64-8K-32, 24LC128-16K-64, 24LC256-32K-64, 24LC512-64K-128, read and write data are 8bits. The format for the above device (Model- address space- page size) of different devices of different sizes of pages, so page written procedures need to be amended accordingly, and other bytes to write, random read and sequential read are the same procedures
File list (Check if you may need any files):
E2PROM_DSP.h
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