Description: VHDL implementation of the twofish cipher for 128,192 and 256 bit keys.
The implementation is in library-like form All needed components up to, including the round/key schedule circuits are implemented, giving the flexibility to be combined in different architectures (iterative, rolled out/pipelined etc). Manual in English is included with more details about how to use the components and/or how to optimize some of them. All testbenches are provided (tables, variable key/text, ECB/CBC monte carlo) for 128, 192 and 256 bit key sizes, along with their respective vector files.
- [kenel_crypto] - core encryption and decryption algorithm
- [AES] - FPGA-based high-speed realization of the
- [AES_RTL] - Realize the use of Verilog HDL hardware
- [phelix] - The Phelix cipher documentation can be o
- [trivium] - The Trivium cipher documentation can be
- [decim] - The Decim cipher documentation can be ob
- [qweqweqweqwe] - 一种新的方法，可以自动对两幅图像进行 ·Matlab code for enco
- [BasicDES] - Basic DES Cipher files
File list (Check if you may need any files):
twofish_latest.tar
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