Title:
BasedonCPLDFPGAsuchasthefrequencyaccuracyofthedesi
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Description: Based on CPLD/FPGA programmable logic devices, with single-chip microcomputer AT89C51 using a standard 50 ~ 100MHz frequency of the periodic signal, such as counting the realization of the system measurement accuracy. Measurement techniques used to complete the gate pulse width, duty cycle measurements.
- [RS232] - FPGA realization of RS-232 serial port t
- [FPGAuartdebug] - FPGA serial debugger interface, using VH
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BasedonCPLD FPGAsuchasthefrequencyaccuracyofthedesign.pdf
