Title:
Radix-4FFTforTMS320C6000
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Description: Fixed-point digital signal processors (DSPs) have limited dynamic range to deal with digital
data. This application report proposes a scheme to test and scale the result output from each
Fast Fourier Transform (FFT) stage in order to fix the accumulation overflow. The radix-4 FFT
algorithm is selected since it provides fewer stages than radix-2 algorithm. Thus, the scaling
operations are minimized. This application report is organized as follows:
- [20040728130640296] - c6000 the application procedure is used,
- [dsplib] - A series of digital signal processing al
- [1024FFT] - 1024-point FFT Fast Fourier Transform VH
- [FFT] - FFT algorithm application and C6000 seri
- [fft] - ICETEK-C6711-A development board by fft
- [seeddsp] - United common routine of the TI, includi
- [fft] - Based on the TMS320C6416 DSP chip fft pr
- [DSP_fft32x32] - Optimized FFT code on TI C64+
- [C6713-FFT] - This is a TMS320C6713-based Fast Fourier
File list (Check if you may need any files):
spra654-Autoscaling Radix-4 FFT for TMS320C6000.pdf
