Description: 于毕业设计与论文以及做课题用-MSK Simulink simulation program for the design and graduation thesis topic, and making use-Design and graduation thesis, as well as issues to do with-MSK Simulink simulation program
- [gmsk_diff] - procedure for the GMSK modulation and de
- [1] - MSK English information on the Bit Error
- [MSK] - Introduction of the MSK modulation and d
- [QPSK] - Using VHDL language features QPSK modula
- [msk_top] - MSK procedures for the use of Verilog FP
- [89346497fpga-example2] - 于毕业设计与论文以及做课题用-MSK Simulink simulation p
- [msk] - MSK_simulink
- [FPGACPLDMSK] - see up
- [msk_demodulation] - MSK/GMSK Demodulation summary of the var
- [VHDLprogram] - There ASK, MSK, PSK, MASK, MFSK the VHDL
File list (Check if you may need any files):
新建文件夹
..........\msk.m
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