Description: SSI received from peripheral devices to the implementation of the serial to parallel data conversion. CPU can access data register SSI to send and receive data. Send and receive path to use the internal FIFO buffer memory unit to allow a maximum of eight 16-bit value in the send and receive mode, an independent store.
- [SSI] - Based on the buffer encoder interface (S
- [ssistudy] - java
- [8bitled] - . SSI interface is Stellaris family of A
- [4.11.1_ssi_send] - ssi 通讯
- [ssi] - SSI interface, read the agreement, is pa
- [SSI-RS232] - SSI protocol conversion for RS232 protoc
- [SPI0_Master] - LPC1100 series microcontrollers Cortex-M
File list (Check if you may need any files):
控制1位静态数码管
.................\Debug
.................\.....\Exe
.................\.....\List
.................\.....\Obj
.................\.....\...\Demo.pbd
.................\Demo.dep
.................\Demo.ewd
.................\Demo.ewp
.................\Demo.eww
.................\main.c
.................\settings
.................\........\Demo.cspy.bat
.................\........\Demo.dbgdt
.................\........\Demo.dni
.................\........\Demo.wsdt
.................\startup_ewarm.c
.................\systemInit.c
.................\systemInit.h
.................\调试说明.txt
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