Title:
ThedesignofUniversalAsynchronousReceiverTransmitte
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Description: According to the characteristics of the UART and the portability advantage of FPGA designs，this paper puts forward an embedded UART design method based on FPGA chips．The design method includes description form of FSM and design approach of Top-Down．It’S good to take advantage of VHDL to program the slave module and top module of UART，and then integrate them into the interior of FPGA chip．In this case it improves not only the disadvantage of the traditional UART chips but also makes the whole system more compact and more reliable．
- [RS232] - quatus II environment realize RS232 VHDL
- [AdaptiveFilterMethodforOn-line] - Adaptive filtering methods in the sensor
- [top] - RS232 serial communication using VHDL pr
- [UART_EX] - Uart 232 module example divied by 3 modu
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ThedesignofUniversalAsynchronousReceiverTransmitterBasedonFPGA.pdf
