Description: The document, a broadband signal processing, source code, to be verified to be successful, you can study and practice for hand
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plx_new\111.cpj
.......\bitgen.xmsgs
.......\clk.cmd_log
.......\clk.lso
.......\clk.ngc
.......\clk.ngr
.......\clk.prj
.......\clk.stx
.......\clk.syr
.......\clk.v
.......\clk.xst
.......\clk250k.v
.......\clk_cs.blc
.......\clk_cs.ngc
.......\clk_summary.html
.......\clk_xst.xrpt
.......\cnt.v
.......\dcm1.v
.......\dcm1_arwz.ucf
.......\dcm3.v
.......\dcm3_arwz.ucf
.......\dcm400m.v
.......\dcm400m_arwz.ucf
.......\dcm45.v
.......\dcm45_arwz.ucf
.......\ddc_kong.cmd_log
.......\ddc_kong.lso
.......\ddc_kong.prj
.......\ddc_kong.v
.......\ddc_kong.xst
.......\ddc_kong_summary.html
.......\device_usage_statistics.html
.......\dk2m.v
.......\fifo.asy
.......\fifo.gise
.......\fifo.ise
.......\fifo.ngc
.......\fifo.sym
.......\fifo.v
.......\fifo.veo
.......\fifo.vhd
.......\fifo.vho
.......\fifo.xco
.......\fifo.xise
.......\fifo_fifo_generator_v4_4_xst_1.ngc_xst.xrpt
.......\fifo_flist.txt
.......\fifo_generator_ug175.pdf
.......\fifo_readme.txt
.......\fifo_summary.html
.......\.....xdb\tmp\ise\version
.......\........\...\...\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject
.......\........\...\...\............\..................\.........\HDProject_StrTbl
.......\........\...\...\............\..................\__stored_object_table__
.......\........\...\...\............\PnAutoRun\Scripts\RunOnce_tcl
.......\........\...\...\............\.........\.......\RunOnce_tcl_StrTbl
.......\........\...\...\............\.rojectNavigator\dpm_project_main\dpm_project_main
.......\........\...\...\............\................\................\dpm_project_main_StrTbl
.......\........\...\...\............\................Gui\CSourceProcessView
.......\........\...\...\............\...................\CSourceProcessView_StrTbl
.......\........\...\...\............\...................\CViewSelector
.......\........\...\...\............\...................\CViewSelector_StrTbl
.......\........\...\...\............\...................\File-SynthesisOnly
.......\........\...\...\............\...................\File-SynthesisOnly_StrTbl
.......\........\...\...\............\...................\Library-SynthesisOnly
.......\........\...\...\............\...................\Library-SynthesisOnly_StrTbl
.......\........\...\...\............\...................\Process-SynthesisOnly-
.......\........\...\...\............\...................\Process-SynthesisOnly-DESUT_NGC
.......\........\...\...\............\...................\Process-SynthesisOnly-DESUT_NGC_StrTbl
.......\........\...\...\............\...................\Process-SynthesisOnly-DESUT_VERILOG
.......\........\...\...\............\...................\Process-SynthesisOnly-DESUT_VERILOG_StrTbl
.......\........\...\...\............\...................\Process-SynthesisOnly-DESUT_VHDL_ARCHITECTURE
.......\........\...\...\............\...................\Process-SynthesisOnly-DESUT_VHDL_ARCHITECTURE_StrTbl
.......\........\...\...\............\...................\Process-SynthesisOnly-_StrTbl
.......\........\...\...\............\...................\Source-SynthesisOnly-AutoCompile
.......\........\...\...\............\...................\Source-SynthesisOnly-AutoCompile_StrTbl
.......\........\...\...\............\xreport\Gc_RvReportViewer-Current-Module
.......\........\...\...\............\.......\Gc_RvReportViewer-Current-Module_StrTbl
.......\........\...\...\............\.......\Gc_RvReportViewer-Module-Data-ddc_kong
.......\........\...\...\............\.......\Gc_RvReportViewer-Module-Data-ddc_kong_StrTbl
.......\........\...\...\............\.......\Gc_RvReportViewer-Module-Data-fifo
.......\........\...\...\............\.......\Gc_RvReportViewer-Module-Data-fifo_StrTbl
.......\........\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default
.......\........\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default_StrTbl
.......\........\...\...\..REGISTRY__\Autonym\regkeys
.......\........\...\...\............\bitgen\regkeys
.......\........\...\...\............\...init\regkeys
.......\........\...\...\............\common\reg