Description: altera cpld EMP1270 development board examples of procedures, including arbitrary waveform generator, serial port, etc.
- [UART] - Serial experiments, very good, and I sti
- [UART] - Serial Communication verilog CPLDEPM1270
- [WaveformGenerator] - Anhui first Undergraduate Electronic Des
- [dual_ram] - FPGA and dual-port RAM of the DDS Arbitr
- [VerilogHDLDDS] - A brief introduction of direct digital f
- [eda] - the map of cpld developed board。
- [aa] - Designed by an arbitrary waveform genera
- [sch] - emp1270 cpld development board schematic
File list (Check if you may need any files):
例子程序\CPLD_LED\CPLD_LED.asm.rpt
........\........\CPLD_LED.bdf
........\........\CPLD_LED.done
........\........\CPLD_LED.fit.eqn
........\........\CPLD_LED.fit.rpt
........\........\CPLD_LED.fit.summary
........\........\CPLD_LED.flow.rpt
........\........\CPLD_LED.map.eqn
........\........\CPLD_LED.map.rpt
........\........\CPLD_LED.map.summary
........\........\CPLD_LED.pin
........\........\CPLD_LED.pof
........\........\CPLD_LED.qpf
........\........\CPLD_LED.qsf
........\........\CPLD_LED.qws
........\........\CPLD_LED.tan.rpt
........\........\CPLD_LED.tan.summary
........\........\db\CPLD_LED.asm.qmsg
........\........\..\CPLD_LED.asm_labs.ddb
........\........\..\CPLD_LED.cbx.xml
........\........\..\CPLD_LED.cmp.cdb
........\........\..\CPLD_LED.cmp.hdb
........\........\..\CPLD_LED.cmp.qrpt
........\........\..\CPLD_LED.cmp.rdb
........\........\..\CPLD_LED.cmp.tdb
........\........\..\CPLD_LED.cmp0.ddb
........\........\..\CPLD_LED.dbp
........\........\..\CPLD_LED.db_info
........\........\..\CPLD_LED.eco.cdb
........\........\..\CPLD_LED.fit.qmsg
........\........\..\CPLD_LED.hier_info
........\........\..\CPLD_LED.hif
........\........\..\CPLD_LED.map.cdb
........\........\..\CPLD_LED.map.hdb
........\........\..\CPLD_LED.map.qmsg
........\........\..\CPLD_LED.pre_map.cdb
........\........\..\CPLD_LED.pre_map.hdb
........\........\..\CPLD_LED.psp
........\........\..\CPLD_LED.rtlv.hdb
........\........\..\CPLD_LED.rtlv_sg.cdb
........\........\..\CPLD_LED.rtlv_sg_swap.cdb
........\........\..\CPLD_LED.sgdiff.cdb
........\........\..\CPLD_LED.sgdiff.hdb
........\........\..\CPLD_LED.signalprobe.cdb
........\........\..\CPLD_LED.sld_design_entry.sci
........\........\..\CPLD_LED.sld_design_entry_dsc.sci
........\........\..\CPLD_LED.syn_hier_info
........\........\..\CPLD_LED.tan.qmsg
........\........\setup.tcl
........\E1270_alltest\bin27seg.bsf
........\.............\bin27seg.vhd
........\.............\char_ram.vhd
........\.............\cont.vhd
........\.............\db\cntr_apd.tdf
........\.............\..\E1270_test.asm.qmsg
........\.............\..\E1270_test.asm_labs.ddb
........\.............\..\E1270_test.cbx.xml
........\.............\..\E1270_test.cmp.cdb
........\.............\..\E1270_test.cmp.hdb
........\.............\..\E1270_test.cmp.qrpt
........\.............\..\E1270_test.cmp.rdb
........\.............\..\E1270_test.cmp.tdb
........\.............\..\E1270_test.cmp0.ddb
........\.............\..\E1270_test.dbp
........\.............\..\E1270_test.db_info
........\.............\..\E1270_test.eco.cdb
........\.............\..\E1270_test.fit.qmsg
........\.............\..\E1270_test.hier_info
........\.............\..\E1270_test.hif
........\.............\..\E1270_test.map.cdb
........\.............\..\E1270_test.map.hdb
........\.............\..\E1270_test.map.qmsg
........\.............\..\E1270_test.pre_map.cdb
........\.............\..\E1270_test.pre_map.hdb
........\.............\..\E1270_test.psp
........\.............\..\E1270_test.rtlv.hdb
........\.............\..\E1270_test.rtlv_sg.cdb
........\.............\..\E1270_test.rtlv_sg_swap.cdb
........\.............\..\E1270_test.sgdiff.cdb
........\.............\..\E1270_test.sgdiff.hdb
........\.............\..\E1270_test.signalprobe.cdb
........\.............\..\E1270_test.sld_design_entry.sci
........\.............\..\E1270_test.sld_design_entry_dsc.sci
........\.............\..\E1270_test.smp_dump.txt
........\.............\..\E1270_test.syn_hier_info
........\.............\..\E1270_test.tan.qmsg
........\.............\E1270_test.asm.rpt
........\.............\E1270_test.bdf
........\.............\E1270_test.cdf
........\.............\E1270_test.done
........\.............\E1270_test.fit.eqn
........\.............\E1270_test.fit.rpt
........\.............\E1270_test.fit.summary
........\.............\E1270_test.flow.rpt
........\.............\E1270_test.map.eqn
........\.............\E1270_test.map.rpt
........\.............\E1270_test.map.summary
........\.............\E1270_test.pin
........\.............\E1270_test.pof
...