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Title: register Download
  • Category:
  • Other systems
  • Tags:
  • File Size:
  • 278kb
  • Update:
  • 2012-11-26
  • Downloads:
  • 0 Times
  • Uploaded by:
  • mc_yds
 Description: Computer Organization experimental general-purpose register group. Only for your reference.
 Downloaders recently: [More information of uploader mc_yds]
 To Search: bus VHDL register
  • [register] - 32 × 32 of the register file, it has 32
  • [mariozhizuojiemi] - Super Secret Mary produced document cont
  • [ram] - The code implements a 32-bit register co
File list (Check if you may need any files):
实验6.9——实验CPU:通用寄存器组\decoder_2to_4.vhd
................................\decoder_2_to_4.vhd
................................\mux_4_to_1.vhd
................................\reg.vhd
................................\regfile.asm.rpt
................................\regfile.cdf
................................\regfile.done
................................\regfile.dpf
................................\regfile.eda.rpt
................................\regfile.fit.rpt
................................\regfile.fit.smsg
................................\regfile.fit.summary
................................\regfile.flow.rpt
................................\regfile.map.rpt
................................\regfile.map.summary
................................\regfile.pin
................................\regfile.pof
................................\regfile.qpf
................................\regfile.qsf
................................\regfile.qws
................................\regfile.sof
................................\regfile.tan.rpt
................................\regfile.tan.summary
................................\regfile.vhd
................................\db\regfile.asm.qmsg
................................\..\regfile.cbx.xml
................................\..\regfile.cmp.cdb
................................\..\regfile.cmp.hdb
................................\..\regfile.cmp.kpt
................................\..\regfile.cmp.logdb
................................\..\regfile.cmp.rdb
................................\..\regfile.cmp.tdb
................................\..\regfile.cmp0.ddb
................................\..\regfile.dbp
................................\..\regfile.db_info
................................\..\regfile.eco.cdb
................................\..\regfile.eda.qmsg
................................\..\regfile.fit.qmsg
................................\..\regfile.hier_info
................................\..\regfile.hif
................................\..\regfile.map.cdb
................................\..\regfile.map.hdb
................................\..\regfile.map.logdb
................................\..\regfile.map.qmsg
................................\..\regfile.pre_map.cdb
................................\..\regfile.pre_map.hdb
................................\..\regfile.psp
................................\..\regfile.rtlv.hdb
................................\..\regfile.rtlv_sg.cdb
................................\..\regfile.rtlv_sg_swap.cdb
................................\..\regfile.sgdiff.cdb
................................\..\regfile.sgdiff.hdb
................................\..\regfile.signalprobe.cdb
................................\..\regfile.sld_design_entry.sci
................................\..\regfile.sld_design_entry_dsc.sci
................................\..\regfile.syn_hier_info
................................\..\regfile.tan.qmsg
................................\simulation\activehdl\regfile.vo
................................\..........\.........\regfile_v.sdo
................................\timing\primetime\regfile.vho
................................\......\.........\regfile_pt_vhd.tcl
................................\......\.........\regfile_vhd.sdo
................................\simulation\activehdl
................................\timing\primetime
................................\db
................................\simulation
................................\timing
实验6.9——实验CPU:通用寄存器组
    

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