File list (Check if you may need any files):
VHDL\VHDL\lab3.vhdl
....\....\summ.sws
....\....\......ym\adder\prim.dep
....\....\........\.....\prim.var
....\....\........\.....\_behaviour.dep
....\....\........\.....\_behaviour.var
....\....\........\....._n\prim.dep
....\....\........\.......\prim.var
....\....\........\.......\_my_bench.dep
....\....\........\.......\_my_bench.var
....\....\........\......testbench\prim.dep
....\....\........\...............\prim.var
....\....\........\...............\_behaviour.dep
....\....\........\...............\_behaviour.var
....\....\........\catalog.vlb
....\....\Waveform0.wfs
....\....\summ.sym\adder
....\....\........\adder_n
....\....\........\adder_testbench
....\....\summ.sym
....\VHDL
VHDL