Description: Intel started from 386, introduced in debugging hardware debug breakpoint registers and the concept.
IA-32 processor defines eight debug registers, respectively, DR0 ~ DR7. In 32-bit mode, they are 32 in 64-bit mode, all 64-bit.
DR4 and DR5 are reserved. The other six registers are: four 32-bit debug address register (DR0 ~ DR3) 1 32-bit debug control register (DR7) and a 32-bit debug status register (DR6). Through the above register can set up to four breakpoints, DR0 ~ DR3 is used to specify the memory breakpoint (linear address) or I/O address. DR7 is used to further define the breakpoint interrupt condition. The role of DR6 when debugging event occurs, the debugger (debugger) reported details of the event for the debugger to determine what kind of events took place.
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BIOS Rootkit 及其检测技术的研究--技术完整版.doc
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