Description: VHDL language based the EDA the stopwatch job design, including divide the stopwatch the main digital display decoder, with the project file and pin information (EDA Job Western Electric 02105143)
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EDA秒表\Block1.bdf
.......\db\prev_cmp_Vhdl1.asm.qmsg
.......\..\prev_cmp_Vhdl1.fit.qmsg
.......\..\prev_cmp_Vhdl1.map.qmsg
.......\..\prev_cmp_Vhdl1.qmsg
.......\..\prev_cmp_Vhdl1.sim.qmsg
.......\..\prev_cmp_Vhdl1.sta.qmsg
.......\..\prev_cmp_Vhdl1.tan.qmsg
.......\..\Vhdl1.asm.qmsg
.......\..\Vhdl1.cbx.xml
.......\..\Vhdl1.cmp.bpm
.......\..\Vhdl1.cmp.cdb
.......\..\Vhdl1.cmp.ecobp
.......\..\Vhdl1.cmp.hdb
.......\..\Vhdl1.cmp.kpt
.......\..\Vhdl1.cmp.logdb
.......\..\Vhdl1.cmp.rdb
.......\..\Vhdl1.cmp.tdb
.......\..\Vhdl1.cmp0.ddb
.......\..\Vhdl1.cmp2.ddb
.......\..\Vhdl1.cmp_merge.kpt
.......\..\Vhdl1.db_info
.......\..\Vhdl1.eco.cdb
.......\..\Vhdl1.fit.qmsg
.......\..\Vhdl1.hier_info
.......\..\Vhdl1.hif
.......\..\Vhdl1.lpc.html
.......\..\Vhdl1.lpc.rdb
.......\..\Vhdl1.lpc.txt
.......\..\Vhdl1.map.bpm
.......\..\Vhdl1.map.cdb
.......\..\Vhdl1.map.ecobp
.......\..\Vhdl1.map.hdb
.......\..\Vhdl1.map.kpt
.......\..\Vhdl1.map.logdb
.......\..\Vhdl1.map.qmsg
.......\..\Vhdl1.map_bb.cdb
.......\..\Vhdl1.map_bb.hdb
.......\..\Vhdl1.map_bb.logdb
.......\..\Vhdl1.pre_map.cdb
.......\..\Vhdl1.pre_map.hdb
.......\..\Vhdl1.rtlv.hdb
.......\..\Vhdl1.rtlv_sg.cdb
.......\..\Vhdl1.rtlv_sg_swap.cdb
.......\..\Vhdl1.sgdiff.cdb
.......\..\Vhdl1.sgdiff.hdb
.......\..\Vhdl1.sim.cvwf
.......\..\Vhdl1.sld_design_entry.sci
.......\..\Vhdl1.sld_design_entry_dsc.sci
.......\..\Vhdl1.syn_hier_info
.......\..\Vhdl1.tan.qmsg
.......\..\Vhdl1.tis_db_list.ddb
.......\..\Vhdl1.tmw_info
.......\..\Vhdl1_global_asgn_op.abo
.......\..\wed.wsf
.......\EDA_UP3扩展板信号对应关系表.doc
.......\incremental_db\compiled_partitions\Vhdl1.root_partition.cmp.atm
.......\..............\...................\Vhdl1.root_partition.cmp.dfp
.......\..............\...................\Vhdl1.root_partition.cmp.hdbx
.......\..............\...................\Vhdl1.root_partition.cmp.kpt
.......\..............\...................\Vhdl1.root_partition.cmp.logdb
.......\..............\...................\Vhdl1.root_partition.cmp.rcf
.......\..............\...................\Vhdl1.root_partition.map.atm
.......\..............\...................\Vhdl1.root_partition.map.dpi
.......\..............\...................\Vhdl1.root_partition.map.hdbx
.......\..............\...................\Vhdl1.root_partition.map.kpt
.......\..............\README
.......\Vhdl1.asm.rpt
.......\Vhdl1.bsf
.......\Vhdl1.done
.......\Vhdl1.dpf
.......\Vhdl1.fit.rpt
.......\Vhdl1.fit.smsg
.......\Vhdl1.fit.summary
.......\Vhdl1.flow.rpt
.......\Vhdl1.map.rpt
.......\Vhdl1.map.summary
.......\Vhdl1.pin
.......\Vhdl1.qpf
.......\Vhdl1.qsf
.......\Vhdl1.qws
.......\Vhdl1.sim.rpt
.......\Vhdl1.sof
.......\Vhdl1.sta.rpt
.......\Vhdl1.sta.summary
.......\Vhdl1.tan.rpt
.......\Vhdl1.tan.summary
.......\Vhdl1.vhd
.......\Vhdl1.vhd.bak
.......\Vhdl1.vwf
.......\Vhdl1_assignment_defaults.qdf
.......\incremental_db\compiled_partitions
.......\db
.......\incremental_db
EDA秒表
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