Description: FPGA-based signal acquisition and spectrum analysis, using VHDL prepared compression bag Quartus engineering. AD sampling using the state machine to achieve now, and into the LPM_RAM. Design a UART module (which is also the state machine), the data is sent to the PC. Has passed the test.
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File list (Check if you may need any files):
FEP1C3_12_7_SP\EP1C3_12_7_SPCTR\ADSRAM.VHD
..............\................\ADSUART.ACF
..............\................\ADSUART.asm.rpt
..............\................\ADSUART.CDF
..............\................\ADSUART.done
..............\................\ADSUART.fit.summary
..............\................\ADSUART.flow.rpt
..............\................\ADSUART.HIF
..............\................\ADSUART.map.summary
..............\................\ADSUART.MMF
..............\................\ADSUART.PIN
..............\................\ADSUART.QPF
..............\................\ADSUART.QSF
..............\................\ADSUART.QWS
..............\................\ADSUART.SOF
..............\................\ADSUART.tan.summary
..............\................\ADSUART.VHD
..............\................\cmp_state.ini
..............\................\LPMRAM.VHD
..............\................\README\DATA.TXT
..............\................\......\FreqAna.exe
..............\................\......\FreqAnaM5.dll
..............\................\......\GW48使用readme.txt
..............\................\......\GW48使用readme1.txt
..............\................\STP1.STP
..............\................\SUART.VHD
..............\................\U_BAUD.VHD
..............\................\U_REC.VHD
..............\................\U_XMIT.VHD
..............\................\README
..............\EP1C3_12_7_SPCTR
FEP1C3_12_7_SP
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