Description: TI C6474 evaluation board fpga source code, the code necessary to initialize the board, Verilog HDL hardware language.
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C6474L_EVM_RTL
..............\nfc_gen_defines.v
..............\tievm_bmc.v
..............\tievm_clk_cntr.v
..............\tievm_cntr.v
..............\tievm_crm_cm.v
..............\tievm_dff_sync.v
..............\tievm_fpga_reset_sync.v
..............\tievm_fpga_top.v
..............\tievm_gic.v
..............\tievm_gic_cr.v
..............\tievm_gic_nic.v
..............\tievm_gic_pmb.v
..............\tievm_nic_dpram.v
..............\tievm_nic_nicfifo.v
..............\tievm_nic_nicfsm.v
..............\tievm_pmb_pmbfsm.v
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