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Title:
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Download
Category:
VHDL-FPGA-Verilog
Tags:
[VHDL]
[源码]
File Size:
1.66kb
Update:
2008-10-13
Downloads:
0 Times
Uploaded by:
ycc1980
Description:
Xilinx FPGAs use JTAG interface as user IO source. Support for arbitrary bit width.
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