- Category:
- Algorithm
- Tags:
-
[WORD]
- File Size:
- 713.33kb
- Update:
- 2008-10-13
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- Uploaded by:
- lwym
Description: a very simple cpu design of the original code, was prepared by the Verilog
- [risc_cpu] - This is the RISC cpu code which writed b
- [code of 8051verilog] - Verilog OF 8051
- [simple_design_cpu] - there is a simple design of the cpu deve
- [CPUverilog] - pic cpu source code. it is writed in the
- [7_4859_1] - Verilog University of Paisley and Adams
- [countqi] - Asynchrony preset counter reset the Veri
- [C51LCD] - C language LCD multi-level menu (complet
- [RISC_Core.ZIP] - This is an 8-bit RISC CPU on the design
- [risc_cpu] - 8-bit risc cpu the preparation, use the
- [RiscCpu] - Verilog-RISC CPU code to achieve a simpl
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