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Title:
Parall_transfer_seior
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Category:
VHDL-FPGA-Verilog
Tags:
File Size:
1.64kb
Update:
2008-10-13
Downloads:
0 Times
Uploaded by:
guochunji
Description:
this document is in two MAXplusII environment through the development and operation of the VHDL documents, and the realization of serial conversion function.
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