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Title:
usb_phy
Download
Category:
VHDL-FPGA-Verilog
Tags:
[VHDL]
[源码]
File Size:
9.85kb
Update:
2008-10-13
Downloads:
0 Times
Uploaded by:
liuzefustiff
Description:
umti the agreement usb1.1 verilog the original documents, the public can refer to achieve usb2.0
Downloaders recently:
[
More information of uploader liuzefustiff
]
To Search:
USB
verilog usb
usb phy
USB2.0
usb1.1
USB verilog
UMTI protocol
umti
usb _p
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7414-matlab
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verilogpll
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USB2.0IP_core_Verilog
] - complete with verilog language developme
[
usb1_funct
] - usb1.1 verilog the source code. Simulati
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verilog_usbblaster
] - Verilog prepared using USB download cabl
[
USB2.0_INTERFACE_IP_CORE
] - Development environment ise6+, USB2.0 in
[
EVB3250
] - EVB3250 is a SMSC s USB3250 chip USB2.0
[
usb_phy
] - Written in fairly good USBPHY source cod
[
usb11.tar
] - FPGA
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