Title:
Median-Filtering-Alogrithm-on-FPGA
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Description: In the implemention of this algorithm on FPGA,we can make full use of the property of hardware parallelism and adopt the pipelining technology to abtain the purpose of improving image processing speed.The implementation results of this alorithm on FPGA hardware show that,this algorithm not only meets the requirements of real-time image processing,but also avoids the flaw of image burring in filtering the salt and pepper noise and achieves the purpose of preserving image details,compared with the traditional fast median filtering algorithm.
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基于FPGA的中值滤波算法的设计与实现.pdf
