proj4\.lso
.....\ACE312coursedoc_.coe
.....\ACE312coursedoc_9.coe
.....\adder.vhd
.....\adder4bytes.vhd
.....\adder4bytes_vhdl.prj
.....\ALU.vhd
.....\ALU_control.vhd
.....\ALU_StageUnit.prj
.....\ALU_StageUnit.stx
.....\ALU_StageUnit.vhd
.....\ALU_StageUnit.xst
.....\ALU_StageUnit_stx_beh.prj
.....\ALU_StageUnit_vhdl.prj
.....\ARM.vhd
.....\ARM_summary.html
.....\ARM_vhdl.prj
.....\control_StageUnit.vhd
.....\control_StageUnit_vhdl.prj
.....\countern.vhd
.....\countern_vhdl.prj
.....\datapath.vhd
.....\datapath_vhdl.prj
.....\decodeUnit.vhd
.....\decodeUnit_vhdl.prj
.....\fullAdd.vhd
.....\fuse.log
.....\fuse.xmsgs
.....\fuseRelaunch.cmd
.....\ifStageUnit.vhd
.....\ifStageUnit_vhdl.prj
.....\.pcore_dir\ACE312coursedoc_.coe
.....\..........\ACE312coursedoc_9.coe
.....\..........\blk_mem_gen_ds512.pdf
.....\..........\blk_mem_gen_v6_2_readme.txt
.....\..........\coregen.cgp
.....\..........\coregen.log
.....\..........\create_MEM1024x32.tcl
.....\..........\create_MEM_aRd_sWr_16x32.tcl
.....\..........\create_MEM_RAM_1024x32.tcl
.....\..........\edit_MEM1024x32.tcl
.....\..........\edit_MEM_RAM_1024x32.tcl
.....\..........\MEM1024x32.asy
.....\..........\MEM1024x32.gise
.....\..........\MEM1024x32.mif
.....\..........\MEM1024x32.ngc
.....\..........\MEM1024x32.sym
.....\..........\MEM1024x32.v
.....\..........\MEM1024x32.veo
.....\..........\MEM1024x32.xco
.....\..........\MEM1024x32.xise
.....\..........\MEM1024x32_flist.txt
.....\..........\...........ste\example_design\bmg_wrapper.vhd
.....\..........\..............\..............\MEM1024x32_top.ucf
.....\..........\..............\..............\MEM1024x32_top.vhd
.....\..........\..............\..............\MEM1024x32_top.xdc
.....\..........\..............\implement\implement.sh
.....\..........\..............\.........\planAhead_rdn.bat
.....\..........\..............\.........\planAhead_rdn.sh
.....\..........\..............\.........\planAhead_rdn.tcl
.....\..........\..............\.........\xst.prj
.....\..........\..............\.........\xst.scr
.....\..........\MEM1024x32_xmdf.tcl
.....\..........\MEM_aRd_sWr_16x32.asy
.....\..........\MEM_aRd_sWr_16x32.gise
.....\..........\MEM_aRd_sWr_16x32.ngc
.....\..........\MEM_aRd_sWr_16x32.sym
.....\..........\MEM_aRd_sWr_16x32.v
.....\..........\MEM_aRd_sWr_16x32.veo
.....\..........\MEM_aRd_sWr_16x32.xco
.....\..........\MEM_aRd_sWr_16x32.xise
.....\..........\MEM_aRd_sWr_16x32_flist.txt
.....\..........\..................ste\example_design\bmg_wrapper.vhd
.....\..........\.....................\..............\MEM_aRd_sWr_16x32_top.ucf
.....\..........\.....................\..............\MEM_aRd_sWr_16x32_top.vhd
.....\..........\.....................\..............\MEM_aRd_sWr_16x32_top.xdc
.....\..........\.....................\implement\implement.sh
.....\..........\.....................\.........\planAhead_rdn.bat
.....\..........\.....................\.........\planAhead_rdn.sh
.....\..........\.....................\.........\planAhead_rdn.tcl
.....\..........\.....................\.........\xst.prj
.....\..........\.....................\.........\xst.scr
.....\..........\MEM_aRd_sWr_16x32_xmdf.tcl
.....\..........\MEM_RAM_1024x32.asy
.....\..........\MEM_RAM_1024x32.gise
.....\..........\MEM_RAM_1024x32.ngc
.....\..........\MEM_RAM_1024x32.sym
.....\..........\MEM_RAM_1024x32.v
.....\..........\MEM_RAM_1024x32.veo
.....\..........\MEM_RAM_1024x32.xco
.....\..........\MEM_RAM_1024x32.xise
.....\..........\MEM_RAM_1024x32_flist.txt
.....\..........\................ste\example_design\bmg_wrapper.vhd
.....\..........\...................\..............\MEM_RAM_1024x32_top.ucf
.....\..........\...................\..............\MEM_RAM_1024x32_top.vhd
.....\..........\...................\..............\MEM_RAM_1024x32_top.xdc
.....\..........\...................\implement\implement.sh
.....\..........\...................\.........\planAhead_rdn.bat
.....\..........\...................\.........\planAhead_rdn.sh
.....\..........\...................\.........\planAhead_rdn.tcl