Description: In this demonstration, we will show how to send and receive Ethernet packets using the Fast Ethernet controller on DE2 board. We use the Nios II processor to send and receive Ethernet packets using the DM9000A Ethernet PHY/MAC Controller.
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File list (Check if you may need any files):
DE2_NET\.sopc_builder\filters.xml
.......\.............\install.ptf
.......\.............\install2.ptf
.......\.............\preferences.xml
.......\Audio_0.v
.......\Audio_PLL.ppf
.......\Audio_PLL.qip
.......\Audio_PLL.v
.......\button_pio.v
.......\cpu_0.ocp
.......\cpu_0.sdc
.......\cpu_0.v
.......\cpu_0_bht_ram.mif
.......\cpu_0_dc_tag_ram.mif
.......\cpu_0_ic_tag_ram.mif
.......\cpu_0_jtag_debug_module_sysclk.v
.......\cpu_0_jtag_debug_module_tck.v
.......\cpu_0_jtag_debug_module_wrapper.v
.......\cpu_0_mult_cell.v
.......\cpu_0_ociram_default_contents.mif
.......\cpu_0_oci_test_bench.v
.......\cpu_0_rf_ram_a.mif
.......\cpu_0_rf_ram_b.mif
.......\cpu_0_test_bench.v
.......\DE2_NET.done
.......\DE2_NET.dpf
.......\DE2_NET.fit.smsg
.......\DE2_NET.fit.summary
.......\DE2_NET.jdi
.......\DE2_NET.map.smsg
.......\DE2_NET.map.summary
.......\DE2_NET.pin
.......\DE2_NET.pof
.......\DE2_NET.qpf
.......\DE2_NET.qsf
.......\DE2_NET.sof
.......\DE2_NET.sta.summary
.......\DE2_NET.v
.......\DE2_NET_assignment_defaults.qdf
.......\demo_batch\DE2_NET.sof
.......\..........\hello_world.elf
.......\..........\test.bat
.......\..........\test_bashrc
.......\DM9000A.v
.......\epcs_controller.v
.......\epcs_controller_boot_rom_synth.hex
.......\greybox_tmp\cbx_args.txt
.......\I2C_AV_Config.v
.......\I2C_Controller.v
.......\ip\Audio_DAC_FIFO\AUDIO_DAC_FIFO_hw.tcl
.......\..\..............\cb_generator.pl
.......\..\..............\class.ptf
.......\..\..............\hdl\AUDIO_DAC_FIFO.v
.......\..\..............\...\FIFO_16_256.v
.......\..\Binary_VGA_Controller\cb_generator.pl
.......\..\.....................\class.ptf
.......\..\.....................\hdl\Img_DATA.hex
.......\..\.....................\...\Img_RAM.v
.......\..\.....................\...\VGA_Controller.v
.......\..\.....................\...\VGA_NIOS_CTRL.v
.......\..\.....................\...\VGA_OSD_RAM.v
.......\..\.....................\...\VGA_Param.h
.......\..\.....................\inc\VGA.c
.......\..\.....................\...\VGA.h
.......\..\.....................\VGA_NIOS_CTRL_hw.tcl
.......\..\DM9000A\cb_generator.pl
.......\..\.......\class.ptf
.......\..\.......\DM9000A_IF_hw.tcl
.......\..\.......\hdl\DM9000A_IF.v
.......\..\.......\inc\basic_io.h
.......\..\.......\...\DM9000A.C
.......\..\.......\...\DM9000A.H
.......\..\ISP1362\inc\BASICTYP.H
.......\..\.......\...\COMMON.H
.......\..\.......\...\HAL4D13.C
.......\..\.......\...\HAL4D13.H
.......\..\.......\...\usb_irq.c
.......\..\.......\...\usb_irq.h
.......\..\.......\ISP1362_IF.v
.......\..\.......\ISP1362_IF_hw.tcl
.......\..\SEG7_LUT_8\cb_generator.pl
.......\..\..........\class.ptf
.......\..\..........\hdl\SEG7_LUT.v
.......\..\..........\...\SEG7_LUT_8.v
.......\..\..........\inc\basic_io.h
.......\..\..........\SEG7_LUT_8_hw.tcl
.......\..\.RAM_16Bit_512K\cb_generator.pl
.......\..\...............\class.ptf
.......\..\...............\hdl\SRAM_16Bit_512K.v
.......\..\...............\SRAM_16Bit_512K_hw.tcl
.......\ISP1362.v
.......\jtag_uart_0.v
.......\lcd_16207_0.v
.......\led_green.v
.......\led_red.v
.......\Reset_Delay.v
.......\sdram_0.v
.......\sdram_0_test_component.v
.......\SDRAM_PLL.ppf
.......\SDRAM_PLL.qip