移植到FPGA----PowerPC405----XC2VP30FFG896C\lab3\aa\executable.elf
..........................................\....\bitinit.log
..........................................\....\.lkdiagram\MdtXdsSVG_Render.css
..........................................\....\..........\svg10.dtd
..........................................\....\..........\system.html
..........................................\....\..........\system.jpg
..........................................\....\..........\system.svg
..........................................\....\.ootloops\ppc405_0.elf
..........................................\....\data\system.ucf
..........................................\....\.rivers\my_led_v1_00_a\data\my_led_v2_1_0.mdd
..........................................\....\.......\..............\....\my_led_v2_1_0.tcl
..........................................\....\.......\..............\src\Makefile
..........................................\....\.......\..............\...\my_led.c
..........................................\....\.......\..............\...\my_led.h
..........................................\....\.......\..............\...\my_led_selftest.c
..........................................\....\etc\bitgen.ut
..........................................\....\...\download.cmd
..........................................\....\...\fast_runtime.opt
..........................................\....\hdl\dcm_0_wrapper.vhd
..........................................\....\...\dip1_wrapper.vhd
..........................................\....\...\elaborate\plb_bram_if_cntlr_1_bram_elaborate_v1_00_a\hdl\vhdl\plb_bram_if_cntlr_1_bram_elaborate.vhd
..........................................\....\...\.........\..................2_bram_elaborate_v1_00_a\hdl\vhdl\plb_bram_if_cntlr_2_bram_elaborate.vhd
..........................................\....\...\jtagppc_0_wrapper.vhd
..........................................\....\...\my_led_0_wrapper.vhd
..........................................\....\...\opb_intc_0_wrapper.vhd
..........................................\....\...\opb_wrapper.vhd
..........................................\....\...\plb2opb_wrapper.vhd
..........................................\....\...\plb_bram_if_cntlr_1_bram_wrapper.vhd
..........................................\....\...\plb_bram_if_cntlr_1_wrapper.vhd
..........................................\....\...\plb_bram_if_cntlr_2_bram_wrapper.vhd
..........................................\....\...\plb_bram_if_cntlr_2_wrapper.vhd
..........................................\....\...\plb_wrapper.vhd
..........................................\....\...\ppc405_0_wrapper.vhd
..........................................\....\...\ppc405_1_wrapper.vhd
..........................................\....\...\push1_wrapper.vhd
..........................................\....\...\reset_block_wrapper.vhd
..........................................\....\...\rs232_uart_1_wrapper.vhd
..........................................\....\...\system.vhd
..........................................\....\...\system_stub.vhd
..........................................\....\...\timer1_wrapper.vhd
..........................................\....\implementation\bitgen.ut
..........................................\....\..............\cache\cache.cat
..........................................\....\..............\.....\dcm_0_wrapper.ngc
..........................................\....\..............\.....\dip1_wrapper.ngc
..........................................\....\..............\.....\jtagppc_0_wrapper.ngc
..........................................\....\..............\.....\my_led_0_wrapper.ngc
..........................................\....\..............\.....\opb_intc_0_wrapper.ngc
..........................................\....\..............\.....\opb_wrapper.ngc
..........................................\....\..............\.....\plb2opb_wrapper.ngc
..........................................\....\..............\.....\plb_bram_if_cntlr_1_bram_wrapper.ngc
..........................................\....\..............\.....\plb