uarthdl FPGA development of serial communication,

Title: uarthdl

Category:
Com Port
Tags:
[VHDL] [源码]
File Size:
10kb
Update:
2017-02-14
Downloads:
0 Times
Uploaded by:
李四

Description: FPGA development of serial communication, the realization of a large amount of data transmission

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uarthdl\FIFO_uart.v
.......\FIFO_uart.v.bak
.......\FIFO_uart_0.v
.......\greybox_tmp\cbx_args.txt
.......\...........\fifo128.qip
.......\...........\greybox_tmp\cbx_args.txt
.......\my_uart_rx.v
.......\my_uart_top.v
.......\my_uart_top.v.bak
.......\my_uart_tx.v
.......\speed_select.v
.......\uart_control.v
.......\greybox_tmp\greybox_tmp
.......\greybox_tmp
uarthdl