- Category:
- Other systems
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- File Size:
- 2kb
- Update:
- 2018-04-08
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- Uploaded by:
- zj剑影
Description: FPGA implements URAT to realize asynchronous serial port and transceiver control
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File list (Check if you may need any files):
| Filename | Size | Date |
|---|
| FPAG UART Verilog\rec.v | 2306 | 2007-03-19
|
| FPAG UART Verilog\send.v | 2054 | 2007-03-19
|
| FPAG UART Verilog\uart_test.v | 1407 | 2007-04-16
|
| FPAG UART Verilog | 0 | 2018-04-08 |
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