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- Document
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- File Size:
- 160kb
- Update:
- 2018-05-11
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- Uploaded by:
- mms‘’
Description: A simple digital signal ASK modulation system is designed. The system digital baseband signal V1 is m sequence pseudo random signal, carrier signal V2 is sine wave periodic signal, V3 is V1 after binary amplitude shift keying modulation output. The system inputs are CLOCK and RESET signals, CLOCK is the system clock signal and the rising edge triggers. RESET is a system asynchronous reset signal, which is highly effective.
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File list (Check if you may need any files):
Filename | Size | Date |
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ASK\3.数字ASK调制系统_终稿题目.docx | 46164 | 2018-05-03
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ASK\daima\ask.txt | 3135 | 2018-03-23
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ASK\daima\ask_tb.txt | 523 | 2018-03-29
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ASK\数字ASK调制系统设计说明v0.1.docx | 168097 | 2018-03-29
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ASK\daima | 0 | 2018-04-29
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ASK | 0 | 2018-05-11 |