Description: Altera NIOS processor experiments QUARTUS using VHDL compiler into processor, then NIOS SHELL C language runtime. Experimental SRAM and DMA Scheduling
- [altera_lcd_controller] - quartus II-sopc builder avalon Bus LCD c
- [Quartus-guide] - quartus curricula, the use of FPGA begin
- [DMADMA_fanli] - Nios DMA detailed examples, very helpful
- [dma] - Taiwan's Ming Chuan University of DMA da
- [SRAM] - Is a VHDL of SRAM-based procedures, is v
- [DMA] - Nios achieved in an example of DMA proce
- [videocap] - Video capture control of the cache SRAM
- [DE2_LCM_SRAM_PIC_DISPLAY] - Under NIOS, the image is displayed on th
- [SRAM] - This is a SRAM interface driver, to driv
- [udp_pack] - Nios II pack
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