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Description: 标题：数字时钟 目标：STC89C51RC/RD+ 程序描述：在灯跑马实验基础上，学习如何使用七段码表控制数码管的显示，并设计多功能的数字时钟等。 ds1302.c ds1302.hex ds1302.lnp ds1302.LST ds1302.M51 ds1302.OBJ ds1302.Opt ds1302.plg ds1302.Uv2
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Size: 235370 |
Author: m.lium |
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Description: 无沦是用离散逻辑、可编程逻辑，还是用全定制硅器件实现的任何数字设计，为了成功地操
作，可靠的时钟是非常关键的。设计不良的时钟在极限的温度、电压或制造工艺的偏差情况下将
导致错误的行为，并且调试困难、花销很大。 在设计PLD/FPGA时通常采用几种时钟类型。时钟可
分为如下四种类型：全局时钟、门控时钟、多级逻辑时钟和波动式时钟。多时钟系统能够包括上
述四种时钟类型的任意组合。-without the expense of discrete logic, programmable logic, or a full-custom silicon device of any digital design, in order to successfully operate, reliable clock is very critical. The poor design of the clock, the limits of temperature, voltage or manufacturing process of the deviation would lead to wrong behavior, and debugging difficulties, costing much. The design PLD/FPGA usually use several types clock. The clock can be divided into the following four types : global clock, clock gating, multi-level logic clock and volatility clock. Multi-clock system to include the above four types of arbitrary clock portfolio.
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Size: 402432 |
Author: 与言 |
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Description: 本设计由单片机时钟芯片、模数转换芯片为核心，辅以必要的电路，构成了一个具有多功能的数字时钟 。能够准确的显示时间、调整时间、闹钟定时等功能。-designed by the MCU clock chip, analogue to digital converter chip as the core, supplemented by the necessary circuit, constitute a multi-function digital clock. To accurately indicate the time, adjusting time, regular alarm clock functions.
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Size: 76800 |
Author: 玉华 |
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Description: vhdl数字时钟设计
目的，原理仿真
源程序-vhdl digital clock designed, the principle source Simulation
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Size: 146432 |
Author: 邓云君 |
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Description: 功能更加完善的基于vhdl的数字时钟设计
有秒表，时钟，时期，闹钟的功能和整点报时，时间调整，日期调整，闹钟的设定
、、、、、、、
秒表有开始，暂停，清零等功能，且只有在暂停的情况下才能清零。-Function more complete VHDL-based design of the digital clock stopwatch, clock, time, alarm clock function and the whole point timekeeping, time adjustment, date, alarm clock settings ,,,,,,, stopwatch has started, pause, Clear and other functions, and only in the case of the suspension can be cleared.
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Size: 817152 |
Author: 张廷 |
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Description: 多功能数字时钟设计的源程序,可以实现计时\闹钟\鸣笛等基本功能.-露 脿 鹿 | 脛脺脢媒 脳 脰脢 卤 脰脫脡猫 录 脝渭脛脭
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Size: 223232 |
Author: HY |
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Description: 数字时钟的设计报告，包括简介和源代码在里边呢-Digital Clock Design of the report, including profiles and source code inside it
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Size: 45056 |
Author: 曹顺田 |
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Description: 多功能数字时钟设计方案及电路图，以及必要分析-Multi-functional digital clock and circuit design, as well as the need to analyze the
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Size: 4096 |
Author: 生命之碑 |
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Description: 使用汇编语言实现数字时钟设计，用7seg完成显示，并可以通过button对时钟进行调整。并包括系统仿真原理图，适合做设计者使用-The use of assembly language to achieve digital clock design, with the completion of 7seg show, and can adjust the button on the clock. And includes system simulation schematic diagram, suitable for designers to use
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Size: 149504 |
Author: wl |
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Description: 一个单片机80c51数字时钟设计，含电路原理图-A digital clock 80C51 single-chip design, including circuit schematics
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Size: 109568 |
Author: 李强 |
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Description: 单片微机实验设计－－－数字时钟
文件内容：
keil 下开发的源代码 并附带生成的hex文件
protuse下时钟的模拟电路，加载hex文件后可模拟仿真
附带较详细的实验报告
时钟功能：
时分秒显示
秒表
闹钟
日历
具体功能调试就知道了，还是蛮不错的，本人第一次做的单片机小功能。（收藏着）-Single-chip computer experiment design the content of the document--- Digital Clock: keil developed source code and hex file generated incidental protuse analog circuits under the clock, loading hex files can be attached to a more detailed simulation of the experimental report clock functions: midnight calendar alarm clock stopwatch seconds display specific functional debugging knew, or pretty good, I first do small single-chip functions. (Collection)
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Size: 239616 |
Author: xxh |
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Description: 多功能数字时钟设计,用proteus仿真实现!-Multi-function digital clock design, proteus simulation!
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Size: 57344 |
Author: drt |
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Description: 基于单片机设计了一个数字时钟，很精确，经过了多次调试对比-Single-chip design based on a digital clock, very accurate, after comparing a number of debugging
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Size: 1024 |
Author: 马腾 |
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Description: lcd显示，数字时钟设计，已经编译通过，并通过了protues的仿真，大家放心使用
-lcd display, digital clock design, has been compiled through, and through the protues simulation, we rest assured that the use of
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Size: 195584 |
Author: 方金辉 |
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Description: 基于VHDL的数字时钟设计课件，简单，实用-VHDL-based Digital Clock Design Courseware
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Size: 271360 |
Author: 孤独剑 |
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Description: 本文档是一个详细的基于单片机的数字时钟设计的方案，期中包括摘要，功能，流程图，源程序等-Digitalclockdesignbasedonsinglechip
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Size: 134144 |
Author: zhanglu |
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Description: 单片机 数字时钟 设计功能比较全面 可以-Single chip digital clock
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Size: 434176 |
Author: king4381899 |
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Description: 51单片机实现数字万年历设计，可以按键调节时间，掉电后能依靠内有电池继续工作，时钟芯片为1302(51 single-chip digital calendar design, you can adjust the time button, after power down, you can rely on the battery to continue to work, the clock chip is 1302)
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Size: 49152 |
Author: loopy辂
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Description: matlab数字时钟，设计一个能显示日期、小时、分钟、秒的数字电子钟，并具有整点报时的功能。 由晶振电路产生1HZ标准的信号。分、秒为六十进制计数器，时为二十四进制计数器。 可手动校正时、分时间和日期值。(Matlab digital clock, the design of a display date, hour, minute, second digital electronic clock, and with the whole point timekeeping function. The 1HZ standard signal is generated by the crystal oscillator circuit. Minutes and seconds for the sixty decimal counter, when the twenty-four decimal counter. Time, date and time values can be manually corrected.)
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Size: 1436672 |
Author: 小蛋008
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Description: 本设计实现了一种基于FPGA的数字时钟设计，应用Verilog硬件描述语言进行数字电路设计，采用自顶向下的方法将电路系统逐层分解细化，设计数字时钟总体结构、各模块及相应具体电路。在Quartus II 9.0工具软件环境下编译、仿真。最后下载到FPGA实验平台进行测试。本数字时钟具有显示时间、通过按键校准时间、整点报时等功能。(This design realizes a digital clock design based on FPGA, uses the Verilog hardware description language to design the digital circuit, uses the top down method to decompose the circuit system layer by layer, and designs the overall structure of the digital clock, each module and the corresponding specific circuit. Compile and simulate in Quartus II 9 tool software environment. Finally downloaded to the FPGA experimental platform for testing. This digital clock has the functions of display time, calibration time through keys, timing of whole points and so on.)
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Size: 3836928 |
Author: 威威谈谈 |
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