Description: 16位微处理器设计方案，计算机组成原理毕业设计-16-bit microprocessor design, computer design of the composition of the principle of graduation Platform: |
Size: 1021952 |
Author:赵辉 |
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Description: 本文详细介绍了我们为首届全国智能车大赛而准备的智能车系统方案。该
系统以Freescale16 位单片机MC9S12DG128 作为系统控制处理器，采用基于的
摄像头的图像采样模块获取赛道图像信息，通过边缘检测方法提取赛道黑线，
求出小车与黑线间的位置偏差，采用PID 方式对舵机转向进行反馈控制。通过
自制的速度传感器实时获取小车速度，采用Bang-Bang 控制策略形成速度闭环
控制。小车还将通过特定算法分析出前方的路况，并根据路况的不同而为小车
分配以不同的速度。文中将介绍赛车机械结构和调整方法，赛车转向模块和驱
动模块的设计、参数和有关测试，图像采样模块的摄像头工作机制以及安装选
型、采样电路设计和采样策略，还将介绍自制的速度传感器的制作、安装方法
和对其可靠性所做的测试。我们将说明本系统的舵机转向策略、速度闭环控制
与速度分配策略。除智能车系统本身的介绍外，我们还将详细叙述该系统开发
过程中所用到的开发工具、软件以及各种调试、测试手段方法。-In this paper we will demonstrate an intelligent vehicle system scheme
prepared for the first national intelligent vehicle contest. The vehicle system, with
the Freescale16-bit single-chip MC9S12DG128 as its control microprocessor, uses
image-sensor module based on camera to obtain lane image information, then
abstract the black line on the contest lane by edge-detection method and calculate
the position difference between the vehicle and the black line with which we will
have a PID feedback control on the steering angle. The vehicle also uses a
speed-sensor made by ourselves to obtain the real time speed which will be used in a
speed feedback that adopts Bang-Bang control method. Certain algorithm will be
employed to analyze the lane styles in front of the vehicle and set different vehicle
speed according to the lane style. The mechanical structure and adjustment method
of the vehicle, the design, parameters, and relative tests of the vehicle steer module
and driving modul Platform: |
Size: 2048 |
Author:刘 |
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Description: this the vhdl code of arithmetic and logic unit of 16 bit microprocessor.-this is the vhdl code of arithmetic and logic unit of 16 bit microprocessor. Platform: |
Size: 148480 |
Author:Anshul |
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Description: 这是8位微处理器的Verilog源代码，可以欠在Flex10k10里面-This is the 8-bit microprocessor Verilog source code, can they owed in Flex10k10 Platform: |
Size: 90112 |
Author:hbei |
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Description: Prawn is a simple eight-bit microprocessor based on the sample processor described in Chapter 9 of "VHDL : Analysis and Modeling of Digital Systems"by Z. Navabi, McGraw-Hill,Inc. 1993. We have added some features such as interrupt, stack and some conditions for conditional branch to the example in the book.
-Prawn is a simple eight-bit microprocessor based on the sample processor described in Chapter 9 of "VHDL : Analysis and Modeling of Digital Systems"by Z. Navabi, McGraw-Hill,Inc. 1993. We have added some features such as interrupt, stack and some conditions for conditional branch to the example in the book.
Platform: |
Size: 698368 |
Author:ying |
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Description: 进行了一个8位CISC处理器的设计与实现，该微处理器含有计算机基本的功能模块，并对存储器进行了层次化设计。指令系统中的指令分为四大类共十六条，其中包括算术逻辑指令、I/O指令、访存、转移指令和停机指令。在处理器的实现过程中,首先给出了数据通路结构,然后采用VerilogHDL进行硬件电路描述,并对每一个模块进行功能仿真以验证设计的正确性。最后对整个处理器执行程序进行指令验证,并得到综合后的网表。-Conducted an 8-bit CISC processor design and implementation, the microprocessor contains the basic functions of a computer module, and a hierarchical memory design. Instructions in the instruction set is divided into four main categories of a total of 16, including the arithmetic logic instruction, I/O instructions, visit survive the transfer of command and shutdown command. In the processor to achieve the process, first of all, given the structure of the data path, and then the use of hardware circuits VerilogHDL description of each function of a simulation module to verify the correctness of the design. Finally, the entire processor command to verify the implementation of procedures, and comprehensive post-netlist. Platform: |
Size: 518144 |
Author:李东升 |
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Description: MANIK is a 32 bit RISC Microprocessor. The salient features of the processor are listed
below.
Features
Hardware Features
• Data Path Width 32 bits, with Four stage pipeline.
• Mixed 16/32 bit instructions for code density
• Von Neumann Architecture (Data and Instruction in the same
address space).
• Sixteen, 32 bit General Purpose Registers.
• Four USER defined instructions (with Register File Write back
capability).-MANIK is a 32 bit RISC Microprocessor. The salient features of the processor are listed
below.
Features
Hardware Features
• Data Path Width 32 bits, with Four stage pipeline.
• Mixed 16/32 bit instructions for code density
• Von Neumann Architecture (Data and Instruction in the same
address space).
• Sixteen, 32 bit General Purpose Registers.
• Four USER defined instructions (with Register File Write back
capability). Platform: |
Size: 3395584 |
Author:hfayed |
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Description: 支持十条指令的微处理器 包括add sub mov mvi jmp jz in out sti lda微指令 支持8个寄存器 16位数据总线 地址总线 -Supports 10 microprocessor instructions, including add sub mov mvi jmp jz in out sti lda microinstruction registers support 8 data bus 16-bit address bus Platform: |
Size: 1074176 |
Author:张梦 |
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Description: 温度控制系统，以微机和TPC-2003A 32位微机接口试验系统为平台，设计一个单输入单输出单循环的温度控制系统-Temperature control systems to computer and TPC-2003A 32 bit microprocessor interface to test the system as a platform to design a single-input single-output single-loop temperature control system Platform: |
Size: 2048 |
Author:tianbigmouth |
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Description: cisc8位微处理器的vhdl源码。处理功能：求出1到任意整数N之间的奇数之和。并输出。-cisc8 bit microprocessor vhdl source code. Processing functions: find an integer N between 1 and any odd sum. And output. Platform: |
Size: 886784 |
Author:chenmiu |
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Description: 设计一台 8 位的 RISC 模型机，要求具有以下验证程序所要求的功能：
求出 1 到任意一个整数 N 之间的所有偶数之和并输出显示，和为单字长。说明：N 从开
关输入，和从数码管输出，然后输出显示停止。--risc8 bit microprocessor vhdl source code. Processing functions: find an integer N between 1 and any odd sum. And output. Platform: |
Size: 1868800 |
Author:韦乃华 |
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Description: This 8-bit microprocessor with 5 instructions. It is based on 8080 architecture. This architecture called SAP for Simple-As-Possible computer. It very useful design which introduces most of the basic and fundamental ideas behind computer operation.
This design could be used for instruction classes for undergraduate classes or specific VHDL classes. This processor is based on the 8080 architecture, therefore, it could be upgraded step by step to integrate further facilities. It is very exciting challenge for the students to do so. Further, they could think about building complete system, i.e. integrating and I/O peripherals to the processor. -This is 8-bit microprocessor with 5 instructions. It is based on 8080 architecture. This architecture called SAP for Simple-As-Possible computer. It very useful design which introduces most of the basic and fundamental ideas behind computer operation.
This design could be used for instruction classes for undergraduate classes or specific VHDL classes. This processor is based on the 8080 architecture, therefore, it could be upgraded step by step to integrate further facilities. It is very exciting challenge for the students to do so. Further, they could think about building complete system, i.e. integrating and I/O peripherals to the processor.
Platform: |
Size: 5718016 |
Author:gollasantu |
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