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Description: Vitesse 10GE MAC芯片资料
-vitesse VSC7344 10GE MAC datasheet
Platform: |
Size: 2033664 |
Author: yinxuebing |
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Description: 软件可以监控两个文件夹,来随时同
·触摸屏驱动,TSC2046,ADS7843等驱动
·10. 设有n种不同面值的硬币,各硬币
·手机液晶屏的资料,有接口说明,方
·KVM的一些介绍,包括了KVM的简介和
·硕士论文,详细描述了安全中间件的
·the Code standars i do it to my c
·Vitesse 10GE MAC芯-Software can monitor two folders, to keep with the Touch Panel Driver, TSC2046, ADS7843, such as drive 10. There are n different denominations of coins, the coins in LCD screen mobile phone information, there is interface shows that a number of side KVM Introduction, including a brief introduction of the KVM and a master' s thesis, a detailed description of the security middleware the Code standars i do it to my c Vitesse 10GE MAC Core
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Size: 209920 |
Author: 张庆龙 |
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Description: Language - Verilog. The 10GE MAC Core implements the Media Access Control functions for 10Gbps operation as defined in IEEE Std 802.3ae. -Language- Verilog. The 10GE MAC Core implements the Media Access Control functions for 10Gbps operation as defined in IEEE Std 802.3ae.
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Size: 813056 |
Author: Maxim |
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Description: 10G MAC ip核源码其中包含了三个版本。经过测试正确无误。-========================
10GE MAC Core
========================
------------------------
1. Directory Structure
------------------------
The directory structure for this project is shown below.
.
|-- doc - Documentation files
|
|-- rtl
| |-- include - Verilog defines and utils
| `-- verilog - Verilog source files for xge_mac
|
|-- sim
| |-- systemc - SystemC simulation directory
| `-- verilog - Verilog simulation directory
|
`-- tbench
|-- systemc - SystemC test-bench source files
`-- verilog - Verilog test-bench source files
------------------------
2. Simulation
------------------------
There are two simulation environments that can be used to validate the code.
The verilog simulation is very basic and meant for those who want to look
at how the MAC operates without going through the effort of setting up SystemC.
The SystemC environment is more sophisticated and covers
Platform: |
Size: 899072 |
Author: xuchao |
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Description: POS(10GE)verilog代码,加入到工程中就成为仿真平台POS发包、接收器。-POS(10GE)receiver and sender
Platform: |
Size: 6144 |
Author: daisy |
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Description: Ethernet 10GE MAC 以太网10G的MAC Verilog代码实现-Ethernet 10GE MAC
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Size: 828416 |
Author: xiao |
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Description: Intel 10GE controller datasheet
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Size: 7031808 |
Author: Eugene |
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Description: 10G以太网技术,包括10G以太网的发展,实现-10G Ethernet technologies, including 10G Ethernet development, implementation, etc.
Platform: |
Size: 29696 |
Author: 廖先文 |
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Description: The 10GE MAC core is designed for easy integration with proprietary custom logic. It features a POS-L3 like interface for the datapath and a Wishbone compliant interface for
management. The core was intentionally designed with a limited feature set for a small gate footprint.
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Size: 926720 |
Author: ke |
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Description: 10个jquery实现的漂亮图片效果:
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Size: 4424704 |
Author: 梁 |
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Description: 10GE Ethernet FPGA VHDL verilog
Platform: |
Size: 610226 |
Author: 104758548@qq.com |
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