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[Other resource] the-design-of-16-bit-cpu

Description: 用vhdl硬件语言设计的16位cpu，上传的压缩包既包含源代码又包含详细的文档说明。-with vhdl hardware design language of the 16 cpu, Upload compressed contains both the source code also contains a detailed document shows.
Platform: | Size: 128112 | Author: 晶晶 | Hits:

[Software Engineering] cpu-16-vhdl

Description: 16位cpu的vhdl源代码。自己看看，没有注释。-16 cpu vhdl the source code. See for yourself, not Notes.
Platform: | Size: 94995 | Author: 童宗挺 | Hits:

[VHDL-FPGA-Verilog] risc cpu

Description: 一个很好的16位cpu ip内核，用quartus写的
Platform: | Size: 5888 | Author: kingkoyan | Hits:

[VHDL-FPGA-Verilog] cpu16

Description: 一个16位cpu的vhdl代码。具体内容我也不清楚，自己慢慢研究吧-a 16 cpu of VHDL code. Specific content is not clear to me that their study it slowly
Platform: | Size: 3072 | Author: 王林 | Hits:

[VHDL-FPGA-Verilog] 16_risc_cpu

Description: 一个支持精简指令的16位的risc cpu，可综合-a directive to support the streamlining of the 16 RISC CPU can be integrated
Platform: | Size: 163840 | Author: 董 | Hits:

[VHDL-FPGA-Verilog] cpuTerminate

Description: 用VHDL 编写的一个16位的cpu 设计方案，可以执行8条指令。-use VHDL to prepare a 16 cpu design of the program, the implementation of eight instructions.
Platform: | Size: 2108416 | Author: 宋文强 | Hits:

[VHDL-FPGA-Verilog] maxII16_cpu

Description: maxII16_cpu,altera的maxII系列的16位cpu-maxII16_cpu, altera the maxII series of 16 cpu
Platform: | Size: 220160 | Author: lrt | Hits:

[VHDL-FPGA-Verilog] the-design-of-16-bit-cpu

[Software Engineering] cpu-16-vhdl

Description: 16位cpu的vhdl源代码。自己看看，没有注释。-16 cpu vhdl the source code. See for yourself, not Notes.
Platform: | Size: 95232 | Author: 童宗挺 | Hits:

[Other Embeded program] newlib-1.16.0.tar

Description: Newlib 嵌入式 C库标准实现代码，支持多种CPU：ARM、PPC、MIPS、X86-Embedded C library standard Newlib realize code, supports a wide range of CPU: ARM, PPC, MIPS, X86
Platform: | Size: 12024832 | Author: huawei | Hits:

[VHDL-FPGA-Verilog] CPU

Description: 简单的16位CPU的VHDL设计 vhdl代码和cpu设计过程-Simple 16-bit CPU design of the VHDL code and VHDL design process cpu
Platform: | Size: 1488896 | Author: kilva | Hits:

[VHDL-FPGA-Verilog] MyCPU16

Description: 16位cpu设计VHDL源码，其中包括alu，clock，memory等部分的设计-16 cpu design VHDL source code, including alu, clock, memory and other parts of the design
Platform: | Size: 1089536 | Author: 孙冰 | Hits:

[VHDL-FPGA-Verilog] 8-cpu

Description: 8位CPU的VHDL设计,16条指令系统,以及部分测试代码,开发工具是quartusii_60_pc-8-bit CPU of the VHDL design, 16 instruction, as well as some of the test code, development tools is quartusii_60_pc
Platform: | Size: 3072 | Author: FJ | Hits:

[OS program] 16cpu

Description: 实现16位的cpu设计内容使用verilog hdl实现，具体的实现步骤方法，都已经写到文档里面去了！-To achieve 16-bit design of the contents of the cpu using verilog hdl achieve, the specific methods to achieve these steps have already been written inside the document went to!
Platform: | Size: 440320 | Author: gimel_sh | Hits:

[VHDL-FPGA-Verilog] cpu

Description: 16位元浮点数CPU,可作运算,以VHDL编写-16-bit floating point CPU, can be used for computing in order to prepare VHDL
Platform: | Size: 2048 | Author: 朋友 | Hits:

[OS program] CPU

Description: CPU编程，比较低层的硬件编程的 chm 资料文件--
Platform: | Size: 2714624 | Author: 张希行 | Hits:

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[Other resource] the-design-of-16-bit-cpu

[Software Engineering] cpu-16-vhdl

[VHDL-FPGA-Verilog] risc cpu

[VHDL-FPGA-Verilog] cpu16

[VHDL-FPGA-Verilog] 16_risc_cpu

[VHDL-FPGA-Verilog] cpuTerminate

[VHDL-FPGA-Verilog] maxII16_cpu

[VHDL-FPGA-Verilog] the-design-of-16-bit-cpu

[Software Engineering] cpu-16-vhdl

[Other Embeded program] newlib-1.16.0.tar

[VHDL-FPGA-Verilog] CPU

[VHDL-FPGA-Verilog] MyCPU16

[VHDL-FPGA-Verilog] 8-cpu

[OS program] 16cpu

[VHDL-FPGA-Verilog] cpu

[OS program] CPU

[VHDL-FPGA-Verilog] cpu-16-vhdl

[VHDL-FPGA-Verilog] micro

[VHDL-FPGA-Verilog] CPU

[VHDL-FPGA-Verilog] CPU

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