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[VHDL-FPGA-Verilog] TLC5510

Description: altera Quartus II TLC晶片控制 可控制暫存器，手動調整內碼。 (含電路) -altera Quartus II TLC chip control registers can be controlled manually adjust the code. (With circuit)
Platform: | Size: 129024 | Author: 陳小龍 | Hits:

[VHDL-FPGA-Verilog] eeprm

Description: verilog编写的EEPROM代码,包括我们最常用的AT24C02/24C04/24C08/24C16-eeprm is a verilog HDL behavioral model for AT24C02/4/8/16
Platform: | Size: 2048 | Author: sam | Hits:

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