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Description: vhdl,用i2c控制philips的7111和7128-vhdl, and the i2c control philips 7111 and 7128
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Size: 8655 |
Author: kevin |
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Description: MARS-7128-S CPLD开发板VHDL 源码
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Size: 2561952 |
Author: 史蒙克 |
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Description: 一个直接数字频率合成的查表程序,VHDL语言,使用7128调试通过
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Size: 147223 |
Author: Chen.Y.M |
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Description: 基于EMP 7128的数字式相位测量仪相位测量仪
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Size: 9424 |
Author: YAGIC |
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Description: 压缩文件中包含一个7128原理图和简单的测试文件
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Size: 2011461 |
Author: 李述良 |
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Description: 源程序是在VisualDSP环境下开发出来的,目标处理器是4片AD公司的TS1O1 DSP。IDE_FAT32用来在硬盘上创建FAT32文件系统;2)i2c_test编写IIC总线;3)codec_a_in_pal_cf_frame是加载到FLASH的程序,板子在脱离PC自动上电时会把PAL制的图像直接存到CF卡里,CF卡的文件系统是FAT16;4)codec_a_in_pal_buf_boottest是可加载的DSP图像直通程序;5)ADSP-TS101prog_driver是flash的驱动程序。-source of the VisualDSP environment developed, targeted four processor is the company's AD TS1O1 DSP. IDE_FAT32 used in the drive to create FAT32 file system; 2) to prepare i2c_test IIC bus; 3) codec_a_in_pal_cf_frame FLASH is loading procedures, the board automatically from the PC on when power will be the PAL system images directly to CF card, the CF card is the FAT16 file system; 4) can be loaded codec_a_in_pal_buf_boottest DSP image through procedures; 5) ADSP-TS101prog_driver flash is the driver.
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Size: 16384 |
Author: 张娟 |
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Description: JTAG CPLD实现源代码,比用简单并口调试器快5倍以上。
以前总觉得简单的并口jtag板速度太慢,特别是调试bootloader的时候,简直难以忍受。最近没什么事情,于是补习了几天vhdl,用cpld实现了一个快速的jtag转换板。cpld用epm7128stc100-15,晶振20兆,tck频率5兆。用sjf2410作测试,以前写50k的文件用时5分钟,现在则是50秒左右。tck的频率还可以加倍,但是不太稳定,而且速度的瓶颈已经不在tck这里,而在通讯上面了。
-JTAG CPLD source code than the simple parallel debugger five times faster. Before feel simple parallel port JTAG board is too slow, especially when debugging Bootloader, simply intolerable. No matter recently, so VHDL tutorial for a few days, with cpld to achieve a rapid conversion of JTAG board. Cpld with epm7128stc100-15, 20 Katherine crystal, the frequency tck 5 trillion. Sjf2410 used for testing, before the document was made with 50k at 5 minutes, now it is about 50 seconds. Tck frequencies can also doubled, but not too stable, but the rate has not tck bottleneck here, and in the above communications.
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Size: 2048 |
Author: 李伟 |
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Description: turbo jtag CPLD source code
use altera EPM7128S
-turbo jtag CPLD source code use altera EPM7 128S
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Size: 2048 |
Author: z8848 |
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Description: vhdl,用i2c控制philips的7111和7128-vhdl, and the i2c control philips 7111 and 7128
Platform: |
Size: 8192 |
Author: kevin |
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Description: Wince下记事本源码程序,感兴趣的可以来看一看。-under the notebook-source programs, and interested can take a look at.
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Size: 10240 |
Author: fl |
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Description: A7128S 型数字电路实验板的使用——PDF格式,如果没有装adobereader推荐foxreader浏览-A7128S-digital circuit boards experimental use-- PDF format, If not equipped adobereader recommended foxreader View
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Size: 141312 |
Author: wei |
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Description: 单片机开发,可编程器件芯片EPM7128S的管脚功能,典型使用电路,内部参数等的说明。-microcontroller development, programmable device chip EPM71285 pin functions, the use of typical circuit, Parameters such as internal note.
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Size: 28672 |
Author: emma |
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Description: EPM7128 Minimum System
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Size: 68608 |
Author: |
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Description: CPLD-EPM7128SLC84最小系统及下载线,非常适合初学者入门学习。-CPLD-EPM7128SLC84 minimum system and download the line, very suitable for beginners learning portal.
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Size: 105472 |
Author: 威威 |
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Description: MARS-7128-S CPLD开发板VHDL 源码
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Size: 2562048 |
Author: 史蒙克 |
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Description: 一个直接数字频率合成的查表程序,VHDL语言,使用7128调试通过-A direct digital frequency synthesis of look-up table procedures, VHDL language, using 7128 debugging through
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Size: 147456 |
Author: Chen.Y.M |
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Description: 来自精益求精的德国人讲授的VERILOG课件,想接触FPGA/CPLD开发的人是必看的课件。
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Size: 4944896 |
Author: 王方 |
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Description: 基于VHDL8路抢答器系统设计报告,7128S芯片的,有需要的朋友可以-Answer based on the way VHDL8 system design report, 7128S chips, there is a need to be friends
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Size: 227328 |
Author: 麦佳 |
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Description: 基于EMP 7128的数字式相位测量仪相位测量仪-EMP 7128-based digital phase-measuring instrument measuring instrument phase
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Size: 9216 |
Author: YAGIC |
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Description: 7128芯片设计原理图,适合3A一下电流的步进电机驱动器设计,非常实用-7128 chip design schematics for what current 3A stepper motor driver design, very practical
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Size: 10240 |
Author: 冯亮 |
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