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[Software Engineering] 74161sdsy

Description: 这是一个关于７４１６１芯片的说明书文档，很好用的哦！-This is a brochure on 74161 chips documents, Oh good use!
Platform: | Size: 707584 | Author: 冯知凡 | Hits:

[Software Engineering] 74161

Description: 计数器74161功能测试电路状态机程序。该程序是功能测试电路的核心。-Counter 74161 functional test circuit state machine procedures. The program is the core of functional test circuit.
Platform: | Size: 1024 | Author: 左猛 | Hits:

[Other] 60jinzhijiafajishuqi

Description: 60进制加法计数器设计时主要采用数电知识，采用清零法和反馈置数法进行电路设计。用两片74161，采用反馈清零法进行电路设计，此时相当于设计两个加法计数器，左边的是高位片，此时的高位片在电路中相当于是一片六进制的加法计数器，逢六进清零，右边的是低位片，相当于一个十进制的加法计数器，逢十清零，此电路采用置零法与反馈清零法用multisim中进行仿真-60 Counter-band adder design using a number of major electricity knowledge, the use of zero and a few home feedback circuit design method. 2 with 74,161, the Clear Law feedback circuit design, design at this time is equivalent to adding two counters, the left side of the film are high, this time at the high-chip circuits are equivalent to an addition of six hexadecimal counter, every six Clear into the right are the low-chip, which is equivalent to the addition of a decimal counter, every ten cleared, the circuit method and the feedback nulling Clear method in simulation using multisim
Platform: | Size: 217088 | Author: 傅强 | Hits:

[Other] v74161

Description: This file is the implementation of 74161 in VHDL codes and has the ability to synthesized.
Platform: | Size: 212992 | Author: HM | Hits:

[VHDL-FPGA-Verilog] 2222

Description: 12时钟数码管显示，芯片74161，151，248-12 clock digital display, chip 74161,151,248
Platform: | Size: 54272 | Author: 陶宝 | Hits:

[SCM] qinjian

Description: 模为七和模为十的计数器，并用proteus仿真运行成功，芯片有74161,7448,7400等。-Mold and die for seven to ten counter, and with proteus simulation is successful, the chips have 74161,7448,7400, etc.
Platform: | Size: 21504 | Author: 尹越 | Hits:

[SCM] yinyue

Description: 模为七和模为十的计数器，并用proteus仿真运行成功，芯片有74161,7448,7400，希望对你有一定的帮助。-Mold and die for seven to ten counter, and with proteus simulation is successful, the chips have 74161,7448,7400, I hope you have some help.
Platform: | Size: 84992 | Author: 尹越 | Hits:

[matlab] shuzi

Description: 74161实习十进制计数功能，有预置端和清零端-Decimal count
Platform: | Size: 36864 | Author: HEHUICONG | Hits:

[VHDL-FPGA-Verilog] mm

Description: 简单的74161的实验，完成功能仿真以及相关的实验测试，测试可以使用-experiment with SN74161 and simulator
Platform: | Size: 321536 | Author: 李旭 | Hits:

[SCM] xinpianjiance-

Description: 芯片检测,可以检测74系列芯片如7400,74161,74138-Chip testing
Platform: | Size: 303104 | Author: 炎 | Hits:

[VHDL-FPGA-Verilog] Simple_Logic_Continue

Description: quartusII 9编写的74161模块，简单的例子，可以直接运行-The module 74161 with the language of verilog
Platform: | Size: 1369088 | Author: peanut | Hits:

[Other] 设计60

Description: 用74ls161实现60进制计数功能，异步清零法(74161 to achieve 60 hexadecimal)
Platform: | Size: 106496 | Author: fpgaaaaaaa | Hits:

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