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[File Format] 74datasheet

Description: 一些74系列的中文资料。。。。。 希望对大家有一点点用处-Some 74 series of Chinese data. . . . . Hope everyone has a little bit of usefulness
Platform: | Size: 6107136 | Author: 黄承速 | Hits:

[VHDL-FPGA-Verilog] bhgfdti

Description: 含有七人表决器，格雷码变换电路，英文字符显示电路，基本触发器（D和JK），74LS160计数器功能模块，步长可变的加减计数器-Containing seven people vote, and Gray code conversion circuit, the English characters display circuit, the basic flip-flop (D and JK), 74LS160 counter function modules, variable-step addition and subtraction counter
Platform: | Size: 423936 | Author: 俞皓尹 | Hits:

[VHDL-FPGA-Verilog] 74LS160

Description: 一个很实用的74系列的VHDL源码实例，可以很容易的学会VHDL语言-A series of 74 practical examples of VHDL source code, you can easily learn to VHDL language
Platform: | Size: 64512 | Author: dalchan | Hits:

[VHDL-FPGA-Verilog] 74LS160

Description: 源码，VHDL语言编写的74LS160计数器-Source code, VHDL language of the 74LS160 counter
Platform: | Size: 50176 | Author: 周 | Hits:

[Documents] shuzi

Description: 设计一个采用数字电路实现,对时,分,秒.数字显示的计时装置,周期为24小时，显示满刻度为23时59分59秒，并具有校时功能和报时功能的数字电子钟。电路主要采用中规模集成电路.本系统的设计电路由脉冲逻辑电路模块、时钟脉冲模块、时钟译码显示电路模块、整电报时模块、校时模块等部分组成。采用电池作电源，采用低功耗的芯片及液晶显示器，发生器使用石英晶振、计数振荡器CD4060及双D触发器74LS74，计数器采用同步双十进制计数器74LS160，锁存译码器是74LS248，整电报时电路用74LS74，74LS32及扬声器构成。-Design a digital circuit, on the hours, minutes, seconds. Figures show that the timing device, 24-hour period, indicating full scale is 23:59:59 and the time with school functions and timekeeping functions of digital electronic clock. Scale integrated circuits used in the main circuit. The design of this system by the pulse logic circuit module, clock module, the clock display circuit decoding module, when the entire cable module, the campus module components. Using a battery powered, low-power chips and liquid crystal display generator using a quartz crystal oscillator, count of CD4060 oscillator and two D flip-flop 74LS74, two-decimal counter synchronous counter 74LS160, latch decoder is the 74LS248, the whole When telegraph circuits 74LS74, 74LS32 and loudspeaker
Platform: | Size: 449536 | Author: 张龙 | Hits:

[VHDL-FPGA-Verilog] vhdlcoder

Description: 本文件夹包含了16个VHDL 编程实例，仅供读者编程时学习参考。 一、四位可预置75MHz -BCD码（加/减）计数显示器（ADD-SUB）。 二、指示灯循环显示器（LED-CIRCLE) 三、七人表决器vote7 四、格雷码变换器graytobin 五、1位BCD码加法器bcdadder 六、四位全加器adder4 七、英语字母显示电路 alpher 八、74LS160计数器74ls160 九、可变步长加减计数器 multicount 十、可控脉冲发生器pluse 十一、正负脉宽数控调制信号发生器pluse width 十二、序列检测器string 十三、出租车计费器spend 十四、数字秒表selclk 十五、抢答器 first -This folder contains 16 examples of VHDL programming, only for readers to learn programming reference. 1, 4 Preset 75MHz-BCD code (plus/minus) count display (ADD-SUB). Second, light cycle display (LED-CIRCLE) 3, seven voting machines vote7 4, Gray code converter graytobin 5, a BCD code adder bcdadder six, four full adder adder4 seven or eight English letter display circuit alpher , 74LS160 counter 74ls160 9, variable-step addition and subtraction counters multicount 10, controllable pulse generator pluse 11, positive and negative pulse width modulation signal generator pluse width of NC 12, sequence detector string 13, a taxi billing spend 14 devices, digital stopwatch selclk 15, Responder first
Platform: | Size: 59392 | Author: 李磊 | Hits:

[Other] time

Description: 用74LS160设计电子表，显示时、分、秒，有校时、校分功能-74LS160 design using spreadsheet, showing hours, minutes, seconds, there is school, school sub-functions
Platform: | Size: 294912 | Author: wt | Hits:

[VHDL-FPGA-Verilog] 74ls160

Description: 这是一个使用vhdl语言编写的74LS160计数器，具有同步置位，异步清零的功能。-This is a use vhdl language 74LS160 counter with synchronous set, asynchronous clear function.
Platform: | Size: 38912 | Author: | Hits:

[SCM] bfghfbgfh

Description: 电路设计与仿真，74ls160设计的游戏机种类及功能-Circuit design and simulation, 74ls160 design of the game types and functions
Platform: | Size: 117760 | Author: zhaozhao | Hits:

[Other Web Code] myCalendar

Description: 电子时间显示器现在在任何地方都有涉及到，例如电子表和商场的时间显示等等，所以它是一种既方便又实用的技术，而我们所做的万年历则是在它的基础上做出来的，通过万年历的制作，我们可以进一步了解计数器的使用，了解各个进制之间的转换，以及他的任意进制计数器的构成方法等，并且进一步了解74LS160的性质，以及门电路的使用等。-w jw jfw w lwjf e
Platform: | Size: 1531904 | Author: 李方灯 | Hits:

[VHDL-FPGA-Verilog] Digital-clock

Description: 数字时钟6位数码管显示。主要器件为74ls48和74ls160 /74ls161。功能：1.显示时、分、秒。2. 可以24小时制或12小时制。3. 具有校时功能-Digital clock six digital tube display. Main components of 74ls48 and 74ls160/74ls161. Features: 1. Shows hours, minutes, seconds. (2) a 24-hour or 12-hour clock. 3 a school function
Platform: | Size: 501760 | Author: 苏婧 | Hits:

[VHDL-FPGA-Verilog] 74LS160jishuqi

Description: 74ls160十进制可预置计数器VHDL语言代码-74ls160 decimal VHDL language code can be preset counter
Platform: | Size: 1024 | Author: syt | Hits:

[Other Embeded program] shuzidianzizhong

Description: 基于74LS191和74LS160设计的数字电子钟proteus仿真文件，DSN格式，用proteus打开，主要功能就是电子钟计时，24小时制，有暂停/开始开关，有调整按钮可以调秒，调分和调时-74LS191 and 74LS160 based design of digital electronic clock proteus simulation files, DSN format, with proteus open, the main function is the electronic clock timer, 24-hour clock, pause/start switch, the button can be adjusted to adjust seconds, minutes and hours tune tune
Platform: | Size: 22528 | Author: 梦幻币 | Hits:

[hardware design] digital-clock-circuit-.ms13

Description: 数电_Multisim设计_数字时钟电路 (显示时:分:秒 CP 频率 f 1Hz) 【电路说明】 1 基于 74LS160 做三个计数器(时:24 进制,分:60 进制,秒:60 进制) 2 秒针计数器完成一次计数后,进位给分针计数器的 P 和 T。 分针计数器完成一次计数后,进位给时针计数器的 P 和 T。-Digital circuit _Multisim design _ digital clock circuit (Display: hours: minutes: seconds CP: f 1Hz) 【Circuit Description】 1 based on the 74LS160 do three counters (time: 24 hexadecimal, sub: 60 hexadecimal, seconds: 60 hexadecimal) The 2-second counter completes a count and proceeds to P and T of the minute hand counter. The minute counter completes a count and proceeds to the P and T of the hour counter.
Platform: | Size: 204800 | Author: WeiDi | Hits:

[Other] 577d4aa3

Description: 交通灯课程设计:本设计是基于数字电路芯片完成的，内有Multisim仿真电路（已验证通过），具体设计说明书，基本思路采用74LS160十进制加法计数器来产生四种交通灯状态，计数器是由多功能计数器555产生的1Hz的秒脉冲驱动，希望能对你有所帮助。(Traffic light course design: This design is based on the digital circuit chip, with Multisim Simulation circuit (verified), the specific design specification, the basic idea is to use 74ls160 decimal addition counter to generate four traffic light States, the counter is driven by the 1 Hz second pulse generated by the multi-function counter 555, hoping to help you.)
Platform: | Size: 471040 | Author: sc303030 | Hits:

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