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[Other resourceledctrl

Description: 利用74ls164控制数码管的vhdl程序,采用A与时钟两个信号共同控制,
Platform: | Size: 1270 | Author: gcy | Hits:

[MiddleWareledctrl

Description: 利用74ls164控制数码管的vhdl程序,采用A与时钟两个信号共同控制,-74ls164 control the use of VHDL digital tube procedure for the two signals A and clock common control,
Platform: | Size: 1024 | Author: gcy | Hits:

[SCM74LS164

Description: 74LS164的芯片资料,很 详 细 的 介 绍-74LS164 chip data, it is in detail
Platform: | Size: 97280 | Author: 晓刚 | Hits:

[VHDL-FPGA-Verilogvhdl

Description: 74ls164 8位移位寄存器 串入并出-74ls164 8-bit shift register and a string into
Platform: | Size: 1024 | Author: fankexing | Hits:

[VHDL-FPGA-VerilogLED_CONTROL

Description: 主要是74ls164的串行移位操作,其他的没有什么特别的地方。-Mainly 74ls164 serial shift operation, the other nothing special about it.
Platform: | Size: 1024 | Author: 张建平 | Hits:

[VHDL-FPGA-Verilog74ALS164

Description: 74LS164 counter in vhdl. Inside is a "shift register" full of 8 bits. This means that it behaves like a series-parallel converter in introducing clock pulses and data series on the other.
Platform: | Size: 23552 | Author: arelit | Hits:

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