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[Communication7c68013

Description: 来自赛普拉斯的USB芯片7C68013的数据手册。含7C68013的接口及时序
Platform: | Size: 327273 | Author: ChW168 | Hits:

[CommunicationUSB2.0Acq

Description: 利用赛普拉斯的7C68013芯片开发的数据采集系统
Platform: | Size: 92020 | Author: ChW168 | Hits:

[Other resourceAPP

Description: CYpress 7c68013的例子源码 示波器
Platform: | Size: 124099 | Author: 气功波 | Hits:

[Other resourceFW

Description: CYpress 7c68013的例子固件源码 示波器
Platform: | Size: 90556 | Author: 气功波 | Hits:

[Windows Develop7414-matlab

Description: 赛普拉斯EZ-USBFX2系列产品 CY7C68013usb测试软件.-Cypress EZ-USB FX2 series CY7C68013usb testing software.
Platform: | Size: 159744 | Author: ligang | Hits:

[GPS developezusbdrv

Description: 用vc写的,从PC访问cy7c68013芯片的驱动程序-vc used to write, visit cy7c68013 from PC Chip Driver
Platform: | Size: 34816 | Author: jwgavin | Hits:

[VHDL-FPGA-Verilogcy7c68013fpga

Description: BulkIn是FPGA向CY7C68013发送数据 BulkOut是FPGA从CY7C68013接收数据,可以用LED显示 -BulkIn is the FPGA to the CY7C68013 is BulkOut send data CY7C68013 receive data from the FPGA, you can use LED display
Platform: | Size: 265216 | Author: | Hits:

[Program doc7c68013

Description:
Platform: | Size: 326656 | Author: ChW168 | Hits:

[Program docUSB2.0Acq

Description: 利用赛普拉斯的7C68013芯片开发的数据采集系统-Cypress 7C68013 use of the chip developed by Data Acquisition System
Platform: | Size: 92160 | Author: ChW168 | Hits:

[DSP programUSBManagerOK

Description: 使用Usb cy7c68013与DSP通信,现在已经能够很正确的传递(上传数据)了。 USB资源: 使用了Ep2,Ep6 Ep2, out auto Ep6, in auto FlagA---  PF3 FlagB--- PF6 FlagC---  PF1    需要 EP2 EMPTY     EP6  FULL信号 因此  FlagA---  PF3 --- EP2空 --- 8 h  FlagB--- PF6 --- EP6满 --- e h FlagC---  PF1   PINFLAGSAB=0xE8  极性设置:  PKTEND,EPEF,EPFF high  其他的低   因此 FIFOPINPOLAR = 0x23 包结束信号接在DSP 的 PF7 上面。 以上结束06.11.28  -Usb cy7c68013 with the use of DSP Communications, and now already in place to correct the transmission (upload data) a. USB resources: the use of Ep2, Ep6 Ep2, out auto Ep6, in auto FlagA--- PF3 FlagB--- PF6 FlagC--- PF1 need EP2 EMPTY EP6 FULL signal therefore FlagA--- PF3--- EP2 empty--- 8 h FlagB--- PF6--- EP6 full--- e h FlagC--- PF1 PINFLAGSAB = 0xE8 polarity settings: PKTEND, EPEF, EPFF high the other low-FIFOPINPOLAR = 0x23 packet, therefore the end of the signal received at the DSP
Platform: | Size: 28672 | Author: 张衡 | Hits:

[SCMAPP

Description: CYpress 7c68013的例子源码 示波器-Examples of source CYpress 7c68013 Oscilloscopes
Platform: | Size: 5428224 | Author: 气功波 | Hits:

[SCMFW

Description: CYpress 7c68013的例子固件源码 示波器-Examples of firmware CYpress 7c68013 source Oscilloscopes
Platform: | Size: 90112 | Author: 气功波 | Hits:

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